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Searched refs:cpuss_interrupts_dw0_0_IRQn (Results 1 – 25 of 229) sorted by relevance

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/hal_infineon-3.5.0/mtb-hal-cat1/source/
Dcyhal_dma_dw.c170 …if (irqn >= cpuss_interrupts_dw0_0_IRQn && irqn < cpuss_interrupts_dw0_0_IRQn + (_cyhal_system_irq… in _cyhal_dma_dw_get_block_from_irqn()
201 …if (irqn >= cpuss_interrupts_dw0_0_IRQn && irqn < cpuss_interrupts_dw0_0_IRQn + (_cyhal_system_irq… in _cyhal_dma_dw_get_channel_from_irqn()
202 return (uint8_t)(irqn - cpuss_interrupts_dw0_0_IRQn); in _cyhal_dma_dw_get_channel_from_irqn()
233 … return (_cyhal_system_irq_t)((uint8_t)cpuss_interrupts_dw0_0_IRQn + obj->resource.channel_num); in _cyhal_dma_dw_get_irqn()
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy8c6347bzi_bld43.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bld43.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bud43.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6246bzi_d04.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6247bzi_d44.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6247fdi_d02.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6336bzi_bld13.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6336bzi_bud13.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bld13.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bud13.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6336bzi_bld14.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347bzi_bld44.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347bzi_bud43.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c68237bz_ble.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c68237fm_ble.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcyble_416045_02_device.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6247wi_d54.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347bzi_bld53.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347bzi_bud53.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bld33.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bld53.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bud33.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347fmi_bud53.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator
Dcy8c6347lqi_bld52.h153 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */
312 cpuss_interrupts_dw0_0_IRQn = 50, /*!< 50 [Active] CPUSS DataWire #0, Channel #0 */ enumerator

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