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Searched refs:TR_CTL1 (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_crypto.h66 __IOM uint32_t TR_CTL1; /*!< 0x00000284 True random control 1 */ member
Dcyip_crypto_v2.h65 __IOM uint32_t TR_CTL1; /*!< 0x00000284 True random control 1 */ member
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_crypto_v2.h65 __IOM uint32_t TR_CTL1; /*!< 0x00000284 True random control 1 */ member
/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_hw.h486 #define REG_CRYPTO_TR_CTL1(base) (((CRYPTO_Type*)(base))->TR_CTL1)