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Searched refs:TRIG_OUT_MUX_2_TCPWM0_TR_IN17 (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829A0_config.h416 TRIG_OUT_MUX_2_TCPWM0_TR_IN17 = 0x40000203u, /* tcpwm[0].tr_all_cnt_in[17] */ enumerator
Dcyw20829B0_config.h417 TRIG_OUT_MUX_2_TCPWM0_TR_IN17 = 0x40000203u, /* tcpwm[0].tr_all_cnt_in[17] */ enumerator