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Searched refs:TRIG_IN_MUX_4_TCPWM0_TR_OUT0262 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829A0_config.h298 TRIG_IN_MUX_4_TCPWM0_TR_OUT0262 = 0x00000421u, /* tcpwm[0].tr_out0[262] */ enumerator
Dcyw20829B0_config.h299 TRIG_IN_MUX_4_TCPWM0_TR_OUT0262 = 0x00000421u, /* tcpwm[0].tr_out0[262] */ enumerator
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_04_config.h429 TRIG_IN_MUX_4_TCPWM0_TR_OUT0262 = 0x00000465u, /* tcpwm[0].tr_out0[262] */ enumerator