Home
last modified time | relevance | path

Searched refs:TRIG_IN_MUX_1_TCPWM0_TR_OUT10 (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829A0_config.h109 TRIG_IN_MUX_1_TCPWM0_TR_OUT10 = 0x0000010Au, /* tcpwm[0].tr_out1[0] */ enumerator
Dcyw20829B0_config.h110 TRIG_IN_MUX_1_TCPWM0_TR_OUT10 = 0x0000010Au, /* tcpwm[0].tr_out1[0] */ enumerator