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Searched refs:TRIG_IN_MUX_0_TCPWM0_TR_OUT01 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829A0_config.h77 TRIG_IN_MUX_0_TCPWM0_TR_OUT01 = 0x00000007u, /* tcpwm[0].tr_out0[1] */ enumerator
Dcyw20829B0_config.h77 TRIG_IN_MUX_0_TCPWM0_TR_OUT01 = 0x00000007u, /* tcpwm[0].tr_out0[1] */ enumerator
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_04_config.h89 TRIG_IN_MUX_0_TCPWM0_TR_OUT01 = 0x00000014u, /* tcpwm[0].tr_out0[1] */ enumerator