PERI_DIV_8_CTL_INT8_DIV_Msk (reference) in projects: hal_infineon-3.5.0

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Searched refs:PERI_DIV_8_CTL_INT8_DIV_Msk (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
D	cyip_peri.h	`449 #define PERI_DIV_8_CTL_INT8_DIV_Msk 0xFF00UL macro`
/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/source/
D	cy_sysclk.c	`49 (dividerValue <= (PERI_DIV_8_CTL_INT8_DIV_Msk >> PERI_DIV_8_CTL_INT8_DIV_Pos))) in Cy_SysClk_PeriphSetDivider()`
D	cy_sysclk_v2.c	`55 (dividerValue <= (PERI_DIV_8_CTL_INT8_DIV_Msk >> PERI_DIV_8_CTL_INT8_DIV_Pos))) in Cy_SysClk_PeriPclkSetDivider()`
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
D	cy_device.h	`1412 #define PERI_DIV_8_CTL_INT8_DIV_Msk PERI_PCLK_GR_DIV_8_CTL_INT8_DIV_Msk macro`
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
D	cy_device.h	`1226 #define PERI_DIV_8_CTL_INT8_DIV_Msk PERI_PCLK_GR_DIV_8_CTL_INT8_DIV_Msk macro`

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