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Searched refs:PERIOD_BUFF (Results 1 – 8 of 8) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_tcpwm.h49 __IOM uint32_t PERIOD_BUFF; /*!< 0x00000018 Counter buffered period register */ member
Dcyip_tcpwm_v2.h53 __IOM uint32_t PERIOD_BUFF; /*!< 0x00000024 Counter buffered period register */ member
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_tcpwm_v2.h53 __IOM uint32_t PERIOD_BUFF; /*!< 0x00000024 Counter buffered period register */ member
Dcyip_tcpwm_v3.h57 __IOM uint32_t PERIOD_BUFF; /*!< 0x00000024 Counter buffered period register */ member
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_tcpwm_v2.h53 __IOM uint32_t PERIOD_BUFF; /*!< 0x00000024 Counter buffered period register */ member
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h514 #define TCPWM_CNT_PERIOD_BUFF(base, cntNum) (((TCPWM_V1_Type *)(base))->CNT[cntNum].PERIOD_BUFF)
538 …BUFF(base, grp, cntNum) (((TCPWM_V2_Type *)(base))->GRP[grp].CNT[((cntNum) % 256U)].PERIOD_BUFF)
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h573 #define TCPWM_CNT_PERIOD_BUFF(base, cntNum) (((TCPWM_Type *)(base))->CNT[cntNum].PERIOD_BUFF)
609 …OD_BUFF(base, grp, cntNum) (((TCPWM_Type *)(base))->GRP[grp].CNT[((cntNum) % 256U)].PERIOD_BUFF)
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h1400 #define TCPWM_CNT_PERIOD_BUFF(base, cntNum) (((TCPWM_Type *)(base))->CNT[cntNum].PERIOD_BUFF)
1428 …OD_BUFF(base, grp, cntNum) (((TCPWM_Type *)(base))->GRP[grp].CNT[((cntNum) % 256U)].PERIOD_BUFF)