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Searched refs:PCLK_TCPWM1_CLOCKS5 (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_01_config.h65 PCLK_TCPWM1_CLOCKS5 = 0x0020u, /* tcpwm[1].clocks[5] */ enumerator
Dpsoc6_03_config.h51 PCLK_TCPWM1_CLOCKS5 = 0x0012u, /* tcpwm[1].clocks[5] */ enumerator
Dpsoc6_02_config.h61 PCLK_TCPWM1_CLOCKS5 = 0x001Cu, /* tcpwm[1].clocks[5] */ enumerator
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7200_config.h98 PCLK_TCPWM1_CLOCKS5 = 0x0132u, /* tcpwm[1].clocks[5] */ enumerator