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Searched refs:PCLK_TCPWM0_CLOCKS5 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_01_config.h57 PCLK_TCPWM0_CLOCKS5 = 0x0018u, /* tcpwm[0].clocks[5] */ enumerator
Dpsoc6_02_config.h53 PCLK_TCPWM0_CLOCKS5 = 0x0014u, /* tcpwm[0].clocks[5] */ enumerator
/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h82 PCLK_TCPWM0_CLOCKS5 = 0x012Bu, /* tcpwm[0].clocks[5] */ enumerator