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Searched refs:P1_2_CPUSS_SWJ_SWDIO_TMS (Results 1 – 9 of 9) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dgpio_cyw20829a0_40_qfn.h265 P1_2_CPUSS_SWJ_SWDIO_TMS = 29, /* Digital Deep Sleep - cpuss.swj_swdio_tms */ enumerator
Dgpio_cyw20829b0_40_qfn.h262 P1_2_CPUSS_SWJ_SWDIO_TMS = 29, /* Digital Deep Sleep - cpuss.swj_swdio_tms */ enumerator
Dgpio_cyw20829_52_qfn.h319 P1_2_CPUSS_SWJ_SWDIO_TMS = 29, /* Digital Deep Sleep - cpuss.swj_swdio_tms */ enumerator
Dgpio_cyw20829a0_56_qfn.h358 P1_2_CPUSS_SWJ_SWDIO_TMS = 29, /* Digital Deep Sleep - cpuss.swj_swdio_tms */ enumerator
Dgpio_cyw20829b0_56_qfn.h354 P1_2_CPUSS_SWJ_SWDIO_TMS = 29, /* Digital Deep Sleep - cpuss.swj_swdio_tms */ enumerator
/hal_infineon-3.5.0/mtb-hal-cat1/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c79 {0u, 0u, P1_2, P1_2_CPUSS_SWJ_SWDIO_TMS},
Dcyhal_cyw20829a0_40_qfn.c77 {0u, 0u, P1_2, P1_2_CPUSS_SWJ_SWDIO_TMS},
Dcyhal_cyw20829_56_qfn.c84 {0u, 0u, P1_2, P1_2_CPUSS_SWJ_SWDIO_TMS},
Dcyhal_cyw20829a0_56_qfn.c82 {0u, 0u, P1_2, P1_2_CPUSS_SWJ_SWDIO_TMS},