1 /***************************************************************************//**
2 * \file cy_lvd.h
3 * \version 1.60
4 *
5 * The header file of the LVD driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright (c) (2017-2022), Cypress Semiconductor Corporation (an Infineon company) or
10 * an affiliate of Cypress Semiconductor Corporation.
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 * http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25
26 /**
27 * \addtogroup group_lvd
28 * \{
29 * The LVD driver provides an API to manage the Low Voltage Detection block.
30 *
31 * The functions and other declarations used in this driver are in cy_lvd.h.
32 * You can include cy_pdl.h to get access to all functions
33 * and declarations in the PDL.
34 *
35 * The LVD block provides a status of currently observed VDDD voltage
36 * and triggers an interrupt when the observed voltage crosses an adjusted
37 * threshold.
38 *
39 * \section group_lvd_configuration_considerations Configuration Considerations
40 * To set up an LVD, configure the voltage threshold by the
41 * \ref Cy_LVD_SetThreshold function, ensure that the LVD block itself and LVD
42 * interrupt are disabled (by the \ref Cy_LVD_Disable and
43 * \ref Cy_LVD_ClearInterruptMask functions correspondingly) before changing the
44 * threshold to prevent propagating a false interrupt.
45 * Then configure interrupts by the \ref Cy_LVD_SetInterruptConfig function, do
46 * not forget to initialize an interrupt handler (the interrupt source number
47 * is srss_interrupt_IRQn).
48 * Then enable LVD by the \ref Cy_LVD_Enable function, then wait for at least 20us
49 * to get the circuit stabilized and clear the possible false interrupts by the
50 * \ref Cy_LVD_ClearInterrupt, and finally the LVD interrupt can be enabled by
51 * the \ref Cy_LVD_SetInterruptMask function.
52 *
53 * For example:
54 * \snippet lvd/snippet/main.c Cy_LVD_Snippet
55 *
56 * Note that the LVD circuit is available only in Low Power and Ultra Low Power
57 * modes. If an LVD is required in Deep Sleep mode, then the device
58 * should be configured to periodically wake up from Deep Sleep using a
59 * Deep Sleep wakeup source. This makes sure a LVD check is performed during
60 * Low Power or Ultra Low Power modes.
61 *
62 * \section group_lvd_more_information More Information
63 * See the LVD chapter of the device technical reference manual (TRM).
64 *
65 * \section group_lvd_changelog Changelog
66 * <table class="doxtable">
67 * <tr><th>Version</th><th>Changes</th><th>Reason of Change</th></tr>
68 * <tr>
69 * <td>1.60</td>
70 * <td>Added CAT1D device support.</td>
71 * <td>Added support for CAT1D family of devices.</td>
72 * </tr>
73 * <tr>
74 * <td rowspan="2">1.50</td>
75 * <td>Added CAT1B device support.</td>
76 * <td>Added support for CAT1B family of devices.</td>
77 * </tr>
78 * <tr>
79 * <td>New APIs Added
80 * * Cy_LVD_GetSourceVoltage()
81 * * Cy_LVD_SetSourceVoltage()
82 * </td>
83 * <td>Added new APIs to set and get the source voltage.</td>
84 * </tr>
85 * <tr>
86 * <td>1.40</td>
87 * <td>Added new device support.</td>
88 * <td>Added new family of devices.</td>
89 * </tr>
90 * <tr>
91 * <td>1.30</td>
92 * <td>Fixed/documented MISRA 2012 violations.</td>
93 * <td>MISRA 2012 compliance.</td>
94 * </tr>
95 * <tr>
96 * <td>1.20</td>
97 * <td>
98 Updated the following functions for the PSoC 64 devices:
99 \ref Cy_LVD_Enable, \ref Cy_LVD_Disable, \ref Cy_LVD_SetThreshold,
100 \ref Cy_LVD_ClearInterrupt, \ref Cy_LVD_SetInterrupt,
101 \ref Cy_LVD_SetInterruptMask, \ref Cy_LVD_ClearInterruptMask, and
102 \ref Cy_LVD_SetInterruptConfig.
103 </td>
104 * <td>Added PSoC 64 device support.</td>
105 * </tr>
106 * <tr>
107 * <td rowspan="2">1.10</td>
108 * <td>Flattened the organization of the driver source code into the single
109 * source directory and the single include directory.
110 * </td>
111 * <td>Driver library directory-structure simplification.</td>
112 * </tr>
113 * <tr>
114 * <td>Added register access layer. Use register access macros instead
115 * of direct register access using dereferenced pointers.</td>
116 * <td>Makes register access device-independent, so that the PDL does
117 * not need to be recompiled for each supported part number.</td>
118 * </tr>
119 * <tr>
120 * <td>1.0.1</td>
121 * <td>Added Low Power Callback section</td>
122 * <td>Documentation update and clarification</td>
123 * </tr>
124 * <tr>
125 * <td>1.0</td>
126 * <td>Initial Version</td>
127 * <td></td>
128 * </tr>
129 * </table>
130 *
131 * \defgroup group_lvd_macros Macros
132 * \defgroup group_lvd_functions Functions
133 * \{
134 * \defgroup group_lvd_functions_syspm_callback Low Power Callback
135 * \}
136 * \defgroup group_lvd_enums Enumerated Types
137 */
138
139
140 #if !defined(CY_LVD_H)
141 #define CY_LVD_H
142
143 #include "cy_device.h"
144
145 #if defined (CY_IP_MXS40SSRSS) || (defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION < 3)) || defined (CY_IP_MXS22SRSS)
146
147 #include "cy_pra.h"
148 #include "cy_syspm.h"
149
150 #ifdef __cplusplus
151 extern "C" {
152 #endif
153
154 /** \addtogroup group_lvd_macros
155 * \{
156 */
157
158 /** The driver major version */
159 #define CY_LVD_DRV_VERSION_MAJOR 1
160
161 /** The driver minor version */
162 #define CY_LVD_DRV_VERSION_MINOR 60
163
164 /** The LVD driver identifier */
165 #define CY_LVD_ID (CY_PDL_DRV_ID(0x39U))
166
167 #if defined (CY_IP_MXS40SRSS)
168 /**
169 * \note
170 * These macros are available for CAT1A devices.
171 **/
172
173 /** Interrupt mask for \ref Cy_LVD_GetInterruptStatus(),
174 \ref Cy_LVD_ClearInterrupt() */
175 #define CY_LVD_SRSS_INTR_HVLVD1_MASK (SRSS_SRSS_INTR_HVLVD1_Msk)
176
177 /** Interrupt mask for \ref Cy_LVD_SetInterrupt() */
178 #define CY_LVD_SRSS_INTR_SET_HVLVD1_MASK (SRSS_SRSS_INTR_SET_HVLVD1_Msk)
179
180 /** Interrupt mask for \ref Cy_LVD_GetInterruptMask(),
181 \ref Cy_LVD_SetInterruptMask() and
182 \ref Cy_LVD_ClearInterruptMask() */
183 #define CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK (SRSS_SRSS_INTR_MASK_HVLVD1_Msk)
184
185 /** Interrupt mask for \ref Cy_LVD_GetInterruptStatusMasked() */
186 #define CY_LVD_SRSS_INTR_MASKED_HVLVD1_MASK (SRSS_SRSS_INTR_MASKED_HVLVD1_Msk)
187
188 /** Enable mask for \ref Cy_LVD_Enable() and /ref Cy_LVD_Disable() */
189 #define CY_LVD_SRSS_PWR_LVD_CTL_HVLVD_EN_Msk (SRSS_PWR_LVD_CTL_HVLVD1_EN_Msk)
190
191 #endif
192
193 #if defined (CY_IP_MXS40SSRSS)
194 /**
195 * \note
196 * These macros are available for devices having MXS40SSRSS IP.
197 **/
198
199 /** Interrupt mask for \ref Cy_LVD_GetInterruptStatus(),
200 \ref Cy_LVD_ClearInterrupt() */
201 #define CY_LVD_SRSS_INTR_HVLVD1_MASK (SRSS_SRSS_AINTR_HVLVD1_Msk)
202
203 /** Interrupt mask for \ref Cy_LVD_SetInterrupt() */
204 #define CY_LVD_SRSS_INTR_SET_HVLVD1_MASK (SRSS_SRSS_AINTR_SET_HVLVD1_Msk)
205
206 /** Interrupt mask for \ref Cy_LVD_GetInterruptMask(),
207 \ref Cy_LVD_SetInterruptMask() and
208 \ref Cy_LVD_ClearInterruptMask() */
209 #define CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK (SRSS_SRSS_AINTR_MASK_HVLVD1_Msk)
210
211 /** Interrupt mask for \ref Cy_LVD_GetInterruptStatusMasked() */
212 #define CY_LVD_SRSS_INTR_MASKED_HVLVD1_MASK (SRSS_SRSS_AINTR_MASKED_HVLVD1_Msk)
213
214 /** Enable mask for \ref Cy_LVD_Enable() and /ref Cy_LVD_Disable() */
215 #define CY_LVD_SRSS_PWR_LVD_CTL_HVLVD_EN_Msk (SRSS_PWR_LVD_CTL_HVLVD1_EN_Msk)
216
217 #endif
218
219 #if defined (CY_IP_MXS22SRSS)
220 /**
221 * \note
222 * These macros are available for devices having MXS22SRSS IP.
223 **/
224
225 /** Interrupt mask for \ref Cy_LVD_GetInterruptStatus(),
226 \ref Cy_LVD_ClearInterrupt() */
227 #define CY_LVD_SRSS_INTR_HVLVD1_MASK (SRSS_SRSS_AINTR_HVLVD_Msk)
228
229 /** Interrupt mask for \ref Cy_LVD_SetInterrupt() */
230 #define CY_LVD_SRSS_INTR_SET_HVLVD1_MASK (SRSS_SRSS_AINTR_SET_HVLVD_Msk)
231
232 /** Interrupt mask for \ref Cy_LVD_GetInterruptMask(),
233 \ref Cy_LVD_SetInterruptMask() and
234 \ref Cy_LVD_ClearInterruptMask() */
235 #define CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK (SRSS_SRSS_AINTR_MASK_HVLVD_Msk)
236
237 /** Interrupt mask for \ref Cy_LVD_GetInterruptStatusMasked() */
238 #define CY_LVD_SRSS_INTR_MASKED_HVLVD1_MASK (SRSS_SRSS_AINTR_MASKED_HVLVD_Msk)
239
240 /** Enable mask for \ref Cy_LVD_Enable() and /ref Cy_LVD_Disable() */
241 #define CY_LVD_SRSS_PWR_LVD_CTL_HVLVD_EN_Msk (SRSS_PWR_LVD_CTL_HVLVD_EN_Msk)
242 #endif
243
244
245 /** \} group_lvd_macros */
246
247
248 /** \addtogroup group_lvd_enums
249 * \{
250 */
251
252
253 /**
254 * LVD reference voltage select.
255 */
256 #if defined (CY_IP_MXS22SRSS)
257 typedef enum
258 {
259 CY_LVD_THRESHOLD_2_75_V = 0x0U, /**<Select LVD reference voltage: 2.75V */
260 CY_LVD_THRESHOLD_2_85_V = 0x1U, /**<Select LVD reference voltage: 2.85V */
261 CY_LVD_THRESHOLD_2_95_V = 0x2U, /**<Select LVD reference voltage: 2.95V */
262 CY_LVD_THRESHOLD_3_05_V = 0x3U, /**<Select LVD reference voltage: 3.05V */
263 CY_LVD_THRESHOLD_3_15_V = 0x4U, /**<Select LVD reference voltage: 3.15V */
264 } cy_en_lvd_tripsel_t;
265 #else
266 typedef enum
267 {
268 CY_LVD_THRESHOLD_1_2_V = 0x0U, /**<Select LVD reference voltage: 1.2V */
269 CY_LVD_THRESHOLD_1_4_V = 0x1U, /**<Select LVD reference voltage: 1.4V */
270 CY_LVD_THRESHOLD_1_6_V = 0x2U, /**<Select LVD reference voltage: 1.6V */
271 CY_LVD_THRESHOLD_1_8_V = 0x3U, /**<Select LVD reference voltage: 1.8V */
272 CY_LVD_THRESHOLD_2_0_V = 0x4U, /**<Select LVD reference voltage: 2.0V */
273 CY_LVD_THRESHOLD_2_1_V = 0x5U, /**<Select LVD reference voltage: 2.1V */
274 CY_LVD_THRESHOLD_2_2_V = 0x6U, /**<Select LVD reference voltage: 2.2V */
275 CY_LVD_THRESHOLD_2_3_V = 0x7U, /**<Select LVD reference voltage: 2.3V */
276 CY_LVD_THRESHOLD_2_4_V = 0x8U, /**<Select LVD reference voltage: 2.4V */
277 CY_LVD_THRESHOLD_2_5_V = 0x9U, /**<Select LVD reference voltage: 2.5V */
278 CY_LVD_THRESHOLD_2_6_V = 0xAU, /**<Select LVD reference voltage: 2.6V */
279 CY_LVD_THRESHOLD_2_7_V = 0xBU, /**<Select LVD reference voltage: 2.7V */
280 CY_LVD_THRESHOLD_2_8_V = 0xCU, /**<Select LVD reference voltage: 2.8V */
281 CY_LVD_THRESHOLD_2_9_V = 0xDU, /**<Select LVD reference voltage: 2.9V */
282 CY_LVD_THRESHOLD_3_0_V = 0xEU, /**<Select LVD reference voltage: 3.0V */
283 CY_LVD_THRESHOLD_3_1_V = 0xFU /**<Select LVD reference voltage: 3.1V */
284 } cy_en_lvd_tripsel_t;
285 #endif
286 /**
287 * LVD interrupt configuration select.
288 */
289 typedef enum
290 {
291 CY_LVD_INTR_DISABLE = 0x0U, /**<Select LVD interrupt: disabled */
292 CY_LVD_INTR_RISING = 0x1U, /**<Select LVD interrupt: rising edge */
293 CY_LVD_INTR_FALLING = 0x2U, /**<Select LVD interrupt: falling edge */
294 CY_LVD_INTR_BOTH = 0x3U, /**<Select LVD interrupt: both edges */
295 } cy_en_lvd_intr_config_t;
296
297 /**
298 * LVD output status.
299 */
300 typedef enum
301 {
302 CY_LVD_STATUS_BELOW = 0x0U, /**<The voltage is below the threshold */
303 CY_LVD_STATUS_ABOVE = 0x1U, /**<The voltage is above the threshold */
304 } cy_en_lvd_status_t;
305
306 /**
307 * LVD Voltage Source.
308 */
309 typedef enum
310 {
311 CY_LVD_SOURCE_VDDD = 0x0U, /**<Selects VDDD */
312 CY_LVD_SOURCE_AMUXBUSA = 0x1U, /**<Selects AMUXBUSA*/
313 CY_LVD_SOURCE_RES = 0x2U, /**<Reserved */
314 CY_LVD_SOURCE_VDDIO = 0x3U, /**<Selects VDDIO, Currently Reserved , Selects VDDD */
315 CY_LVD_SOURCE_AMUXBUSB = 0x4U, /**<Selects AMUXBUSB*/
316 } cy_en_lvd_source_t;
317
318 /** \} group_lvd_enums */
319
320 /** \cond internal */
321 /* Macros for conditions used by CY_ASSERT calls */
322 #if defined (CY_IP_MXS22SRSS)
323 #define CY_LVD_CHECK_TRIPSEL(threshold) (((threshold) == CY_LVD_THRESHOLD_2_75_V) || \
324 ((threshold) == CY_LVD_THRESHOLD_2_85_V) || \
325 ((threshold) == CY_LVD_THRESHOLD_2_95_V) || \
326 ((threshold) == CY_LVD_THRESHOLD_3_05_V) || \
327 ((threshold) == CY_LVD_THRESHOLD_3_15_V))
328
329 #else
330 #define CY_LVD_CHECK_TRIPSEL(threshold) (((threshold) == CY_LVD_THRESHOLD_1_2_V) || \
331 ((threshold) == CY_LVD_THRESHOLD_1_4_V) || \
332 ((threshold) == CY_LVD_THRESHOLD_1_6_V) || \
333 ((threshold) == CY_LVD_THRESHOLD_1_8_V) || \
334 ((threshold) == CY_LVD_THRESHOLD_2_0_V) || \
335 ((threshold) == CY_LVD_THRESHOLD_2_1_V) || \
336 ((threshold) == CY_LVD_THRESHOLD_2_2_V) || \
337 ((threshold) == CY_LVD_THRESHOLD_2_3_V) || \
338 ((threshold) == CY_LVD_THRESHOLD_2_4_V) || \
339 ((threshold) == CY_LVD_THRESHOLD_2_5_V) || \
340 ((threshold) == CY_LVD_THRESHOLD_2_6_V) || \
341 ((threshold) == CY_LVD_THRESHOLD_2_7_V) || \
342 ((threshold) == CY_LVD_THRESHOLD_2_8_V) || \
343 ((threshold) == CY_LVD_THRESHOLD_2_9_V) || \
344 ((threshold) == CY_LVD_THRESHOLD_3_0_V) || \
345 ((threshold) == CY_LVD_THRESHOLD_3_1_V))
346 #endif
347 #define CY_LVD_CHECK_INTR_CFG(intrCfg) (((intrCfg) == CY_LVD_INTR_DISABLE) || \
348 ((intrCfg) == CY_LVD_INTR_RISING) || \
349 ((intrCfg) == CY_LVD_INTR_FALLING) || \
350 ((intrCfg) == CY_LVD_INTR_BOTH))
351
352 /* Added for backward Compatibility */
353 #define CY_LVD_INTR (CY_LVD_SRSS_INTR_HVLVD1_MASK)
354
355 /** \endcond */
356
357 /**
358 * \addtogroup group_lvd_functions
359 * \{
360 */
361 __STATIC_INLINE void Cy_LVD_Enable(void);
362 __STATIC_INLINE void Cy_LVD_Disable(void);
363 __STATIC_INLINE void Cy_LVD_SetThreshold(cy_en_lvd_tripsel_t threshold);
364 __STATIC_INLINE cy_en_lvd_status_t Cy_LVD_GetStatus(void);
365 __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatus(void);
366 __STATIC_INLINE void Cy_LVD_ClearInterrupt(void);
367 __STATIC_INLINE void Cy_LVD_SetInterrupt(void);
368 __STATIC_INLINE uint32_t Cy_LVD_GetInterruptMask(void);
369 __STATIC_INLINE void Cy_LVD_SetInterruptMask(void);
370 __STATIC_INLINE void Cy_LVD_ClearInterruptMask(void);
371 __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatusMasked(void);
372 __STATIC_INLINE void Cy_LVD_SetInterruptConfig(cy_en_lvd_intr_config_t lvdInterruptConfig);
373 #if defined (CY_IP_MXS40SSRSS)
374 __STATIC_INLINE uint32_t Cy_LVD_GetSourceVoltage(void);
375 __STATIC_INLINE void Cy_LVD_SetSourceVoltage(cy_en_lvd_source_t source);
376 #endif
377
378 /** \addtogroup group_lvd_functions_syspm_callback
379 * The driver supports SysPm callback for Deep Sleep transition.
380 * \{
381 */
382 cy_en_syspm_status_t Cy_LVD_DeepSleepCallback(cy_stc_syspm_callback_params_t * callbackParams, cy_en_syspm_callback_mode_t mode);
383 /** \} */
384
385 /*******************************************************************************
386 * Function Name: Cy_LVD_Enable
387 ****************************************************************************//**
388 *
389 * Enables the output of the LVD block when the VDDD voltage is
390 * at or below the threshold.
391 * See the Configuration Considerations section for details.
392 *
393 *******************************************************************************/
Cy_LVD_Enable(void)394 __STATIC_INLINE void Cy_LVD_Enable(void)
395 {
396 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
397 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD1_EN, 1U);
398 #else
399 SRSS_PWR_LVD_CTL |= CY_LVD_SRSS_PWR_LVD_CTL_HVLVD_EN_Msk;
400 #endif
401 }
402
403
404 /*******************************************************************************
405 * Function Name: Cy_LVD_Disable
406 ****************************************************************************//**
407 *
408 * Disables the LVD block. A low voltage detection interrupt is disabled.
409 *
410 *******************************************************************************/
Cy_LVD_Disable(void)411 __STATIC_INLINE void Cy_LVD_Disable(void)
412 {
413 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
414 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD1_EN, 0U);
415 #else
416 SRSS_PWR_LVD_CTL &= (uint32_t) ~CY_LVD_SRSS_PWR_LVD_CTL_HVLVD_EN_Msk;
417 #endif
418 }
419
420
421 /*******************************************************************************
422 * Function Name: Cy_LVD_SetThreshold
423 ****************************************************************************//**
424 *
425 * Sets a threshold for monitoring the VDDD voltage.
426 * To prevent propagating a false interrupt, before changing the threshold
427 * ensure that the LVD block itself and LVD interrupt are disabled by the
428 * \ref Cy_LVD_Disable and \ref Cy_LVD_ClearInterruptMask functions
429 * correspondingly.
430 *
431 * \param threshold
432 * Threshold selection for Low Voltage Detect circuit, \ref cy_en_lvd_tripsel_t.
433 *
434 *******************************************************************************/
Cy_LVD_SetThreshold(cy_en_lvd_tripsel_t threshold)435 __STATIC_INLINE void Cy_LVD_SetThreshold(cy_en_lvd_tripsel_t threshold)
436 {
437 CY_ASSERT_L3(CY_LVD_CHECK_TRIPSEL(threshold));
438
439 #if CY_CPU_CORTEX_M4 && defined (CY_DEVICE_SECURE)
440 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD1_TRIPSEL, threshold);
441 #elif defined (CY_IP_MXS22SRSS)
442 SRSS_PWR_LVD_CTL = _CLR_SET_FLD32U(SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD_TRIPSEL, threshold);
443 #else
444 SRSS_PWR_LVD_CTL = _CLR_SET_FLD32U(SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD1_TRIPSEL, threshold);
445 #endif
446 }
447
448
449 /*******************************************************************************
450 * Function Name: Cy_LVD_GetStatus
451 ****************************************************************************//**
452 *
453 * Returns the status of LVD.
454 * SRSS LVD Status Register (PWR_LVD_STATUS).
455 *
456 * \return LVD status, \ref cy_en_lvd_status_t.
457 *
458 *******************************************************************************/
Cy_LVD_GetStatus(void)459 __STATIC_INLINE cy_en_lvd_status_t Cy_LVD_GetStatus(void)
460 {
461 #if defined (CY_IP_MXS40SRSS) && (CY_IP_MXS40SRSS_VERSION >= 3)
462 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','SRSS_PWR_LVD_STATUS_HVLVD1_OK_Msk extracts only 1 bit value');
463 return ((cy_en_lvd_status_t) _FLD2VAL(SRSS_PWR_LVD_STATUS_HVLVD1_OUT, SRSS_PWR_LVD_STATUS));
464 #elif defined (CY_IP_MXS22SRSS)
465 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','SRSS_PWR_LVD_STATUS_HVLVD_OK_Msk extracts only 1 bit value');
466 return ((cy_en_lvd_status_t) _FLD2VAL(SRSS_PWR_LVD_STATUS_HVLVD_OK, SRSS_PWR_LVD_STATUS));
467 #else
468 CY_MISRA_DEVIATE_LINE('MISRA C-2012 Rule 10.8','SRSS_PWR_LVD_STATUS_HVLVD1_OK_Msk extracts only 1 bit value');
469 return ((cy_en_lvd_status_t) _FLD2VAL(SRSS_PWR_LVD_STATUS_HVLVD1_OK, SRSS_PWR_LVD_STATUS));
470 #endif
471 }
472
473
474 /*******************************************************************************
475 * Function Name: Cy_LVD_GetInterruptStatus
476 ****************************************************************************//**
477 *
478 * Returns the status of LVD interrupt.
479 * SRSS Interrupt Register (SRSS_INTR).
480 *
481 * \return SRSS Interrupt status, \ref CY_LVD_SRSS_INTR_HVLVD1_MASK.
482 *
483 *******************************************************************************/
Cy_LVD_GetInterruptStatus(void)484 __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatus(void)
485 {
486 #if defined (CY_IP_MXS40SSRSS)
487 return (SRSS_SRSS_AINTR & CY_LVD_SRSS_INTR_HVLVD1_MASK);
488 #else
489 return (SRSS_SRSS_INTR & CY_LVD_SRSS_INTR_HVLVD1_MASK);
490 #endif
491 }
492
493
494 /*******************************************************************************
495 * Function Name: Cy_LVD_ClearInterrupt
496 ****************************************************************************//**
497 *
498 * Clears LVD interrupt.
499 * SRSS Interrupt Register (SRSS_INTR).
500 *
501 *******************************************************************************/
Cy_LVD_ClearInterrupt(void)502 __STATIC_INLINE void Cy_LVD_ClearInterrupt(void)
503 {
504 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
505 CY_PRA_REG32_SET(CY_PRA_INDX_SRSS_SRSS_INTR, CY_LVD_SRSS_INTR_HVLVD1_MASK);
506 #elif defined (CY_IP_MXS40SSRSS)
507 SRSS_SRSS_AINTR = CY_LVD_SRSS_INTR_HVLVD1_MASK;
508 #else
509 SRSS_SRSS_INTR = CY_LVD_SRSS_INTR_HVLVD1_MASK;
510 #endif
511 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
512 #if defined (CY_IP_MXS40SSRSS)
513 (void) SRSS_SRSS_AINTR;
514 #else
515 (void) SRSS_SRSS_INTR;
516 #endif
517 }
518
519
520 /*******************************************************************************
521 * Function Name: Cy_LVD_SetInterrupt
522 ****************************************************************************//**
523 *
524 * Triggers the device to generate interrupt for LVD.
525 * SRSS Interrupt Set Register (SRSS_INTR_SET).
526 *
527 *******************************************************************************/
Cy_LVD_SetInterrupt(void)528 __STATIC_INLINE void Cy_LVD_SetInterrupt(void)
529 {
530 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
531 CY_PRA_REG32_SET(CY_PRA_INDX_SRSS_SRSS_INTR_SET, CY_LVD_SRSS_INTR_SET_HVLVD1_MASK);
532 #elif defined (CY_IP_MXS40SSRSS)
533 SRSS_SRSS_AINTR_SET = CY_LVD_SRSS_INTR_SET_HVLVD1_MASK;
534 #else
535 SRSS_SRSS_INTR_SET = CY_LVD_SRSS_INTR_SET_HVLVD1_MASK;
536 #endif
537 }
538
539
540 /*******************************************************************************
541 * Function Name: Cy_LVD_GetInterruptMask
542 ****************************************************************************//**
543 *
544 * Returns the mask value of LVD interrupts.
545 * SRSS Interrupt Mask Register (SRSS_INTR_MASK).
546 *
547 * \return SRSS Interrupt Mask value, \ref CY_LVD_SRSS_INTR_HVLVD1_MASK.
548 *
549 *******************************************************************************/
Cy_LVD_GetInterruptMask(void)550 __STATIC_INLINE uint32_t Cy_LVD_GetInterruptMask(void)
551 {
552 #if defined (CY_IP_MXS40SSRSS)
553 return (SRSS_SRSS_AINTR_MASK & CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK);
554 #else
555 return (SRSS_SRSS_INTR_MASK & CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK);
556 #endif
557 }
558
559
560 /*******************************************************************************
561 * Function Name: Cy_LVD_SetInterruptMask
562 ****************************************************************************//**
563 *
564 * Enables LVD interrupts.
565 * Sets the LVD interrupt mask in the SRSS_INTR_MASK register.
566 *
567 *******************************************************************************/
Cy_LVD_SetInterruptMask(void)568 __STATIC_INLINE void Cy_LVD_SetInterruptMask(void)
569 {
570 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
571 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_HVLVD1, 1U);
572 #elif defined (CY_IP_MXS40SSRSS)
573 SRSS_SRSS_AINTR_MASK |= CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK;
574 #else
575 SRSS_SRSS_INTR_MASK |= CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK;
576 #endif
577 }
578
579
580 /*******************************************************************************
581 * Function Name: Cy_LVD_ClearInterruptMask
582 ****************************************************************************//**
583 *
584 * Disables LVD interrupts.
585 * Clears the LVD interrupt mask in the SRSS_INTR_MASK register.
586 *
587 *******************************************************************************/
Cy_LVD_ClearInterruptMask(void)588 __STATIC_INLINE void Cy_LVD_ClearInterruptMask(void)
589 {
590 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
591 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_MASK, SRSS_SRSS_INTR_MASK_HVLVD1, 0U);
592 #elif defined (CY_IP_MXS40SSRSS)
593 SRSS_SRSS_AINTR_MASK &= (uint32_t) ~CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK;
594 #else
595 SRSS_SRSS_INTR_MASK &= (uint32_t) ~CY_LVD_SRSS_INTR_MASK_HVLVD1_MASK;
596 #endif
597 }
598
599
600 /*******************************************************************************
601 * Function Name: Cy_LVD_GetInterruptStatusMasked
602 ****************************************************************************//**
603 *
604 * Returns the masked interrupt status which is a bitwise AND between the
605 * interrupt status and interrupt mask registers.
606 * SRSS Interrupt Masked Register (SRSS_INTR_MASKED).
607 *
608 * \return SRSS Interrupt Masked value, \ref CY_LVD_SRSS_INTR_MASKED_HVLVD1_MASK.
609 *
610 *******************************************************************************/
Cy_LVD_GetInterruptStatusMasked(void)611 __STATIC_INLINE uint32_t Cy_LVD_GetInterruptStatusMasked(void)
612 {
613 #if defined (CY_IP_MXS40SSRSS)
614 return (SRSS_SRSS_AINTR_MASKED & CY_LVD_SRSS_INTR_MASKED_HVLVD1_MASK);
615 #else
616 return (SRSS_SRSS_INTR_MASKED & CY_LVD_SRSS_INTR_MASKED_HVLVD1_MASK);
617 #endif
618 }
619
620
621 /*******************************************************************************
622 * Function Name: Cy_LVD_SetInterruptConfig
623 ****************************************************************************//**
624 *
625 * Sets a configuration for LVD interrupt.
626 * SRSS Interrupt Configuration Register (SRSS_INTR_CFG).
627 *
628 * \param lvdInterruptConfig \ref cy_en_lvd_intr_config_t.
629 *
630 *******************************************************************************/
Cy_LVD_SetInterruptConfig(cy_en_lvd_intr_config_t lvdInterruptConfig)631 __STATIC_INLINE void Cy_LVD_SetInterruptConfig(cy_en_lvd_intr_config_t lvdInterruptConfig)
632 {
633 CY_ASSERT_L3(CY_LVD_CHECK_INTR_CFG(lvdInterruptConfig));
634
635 #if defined (CY_IP_MXS40SRSS)
636 #if CY_CPU_CORTEX_M4 && defined(CY_DEVICE_SECURE)
637 CY_PRA_REG32_CLR_SET(CY_PRA_INDX_SRSS_SRSS_INTR_CFG, SRSS_SRSS_INTR_CFG_HVLVD1_EDGE_SEL, lvdInterruptConfig);
638 #else
639 #if (CY_IP_MXS40SRSS_VERSION < 3)
640 SRSS_SRSS_INTR_CFG = _CLR_SET_FLD32U(SRSS_SRSS_INTR_CFG, SRSS_SRSS_INTR_CFG_HVLVD1_EDGE_SEL, lvdInterruptConfig);
641 #else
642 SRSS_PWR_LVD_CTL = _CLR_SET_FLD32U(SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD1_EDGE_SEL, lvdInterruptConfig);
643 #endif
644 #endif
645 #endif
646
647 #if defined (CY_IP_MXS40SSRSS)
648 SRSS_PWR_LVD_CTL = _CLR_SET_FLD32U(SRSS_PWR_LVD_CTL, SRSS_PWR_LVD_CTL_HVLVD1_EDGE_SEL, lvdInterruptConfig);
649 #endif
650 /* This dummy reading is necessary here. It provides a guarantee that interrupt is cleared at returning from this function. */
651 (void) lvdInterruptConfig;
652 }
653
654 #if defined (CY_IP_MXS40SSRSS)
655
656 /*******************************************************************************
657 * Function Name: Cy_LVD_GetSourceVoltage
658 ****************************************************************************//**
659 *
660 * Returns the index of the source selected
661 *
662 * \return LVD source index, \ref cy_en_lvd_source_t.
663 *
664 *******************************************************************************/
Cy_LVD_GetSourceVoltage(void)665 __STATIC_INLINE uint32_t Cy_LVD_GetSourceVoltage(void)
666 {
667 return (SRSS_PWR_LVD_CTL & SRSS_PWR_LVD_CTL_HVLVD1_SRCSEL_Msk);
668 }
669
670
671 /*******************************************************************************
672 * Function Name: Cy_LVD_SetSourceVoltage
673 ****************************************************************************//**
674 *
675 * Selects the source voltage for LVD.
676 *
677 * \param source \ref cy_en_lvd_source_t.
678 *
679 *
680 *******************************************************************************/
Cy_LVD_SetSourceVoltage(cy_en_lvd_source_t source)681 __STATIC_INLINE void Cy_LVD_SetSourceVoltage(cy_en_lvd_source_t source)
682 {
683 CY_UNUSED_PARAMETER(source); /* Suppress a compiler warning about unused variables */
684 SRSS_PWR_LVD_CTL |= SRSS_PWR_LVD_CTL_HVLVD1_SRCSEL_Msk;
685 }
686 #endif
687
688 /** \} group_lvd_functions */
689
690 #ifdef __cplusplus
691 }
692 #endif
693
694 #endif /* CY_IP_MXS40SRSS */
695
696 #endif /* CY_LVD_H */
697
698 /** \} group_lvd */
699
700
701 /* [] END OF FILE */
702
