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Searched refs:CY_BLE_PORT_CFG_OUT_VAL (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c70 #define CY_BLE_PORT_CFG_OUT_VAL (0xFFFF0000u) macro
543 CY_BLE_PORT_CFG_OUT_VAL, /* cfgOut */ in Cy_BLE_HAL_Init()
556 CY_BLE_PORT_CFG_OUT_VAL, /* cfgOut */ in Cy_BLE_HAL_Init()
569 CY_BLE_PORT_CFG_OUT_VAL, /* cfgOut */ in Cy_BLE_HAL_Init()
/hal_infineon-3.5.0/bless/
Dcy_ble_clk.c70 #define CY_BLE_PORT_CFG_OUT_VAL (0xFFFF0000u) macro
543 CY_BLE_PORT_CFG_OUT_VAL, /* cfgOut */ in Cy_BLE_HAL_Init()
556 CY_BLE_PORT_CFG_OUT_VAL, /* cfgOut */ in Cy_BLE_HAL_Init()
569 CY_BLE_PORT_CFG_OUT_VAL, /* cfgOut */ in Cy_BLE_HAL_Init()