CY_BLE_DEFAULT_RCB_CTRL_DIV (reference) in projects: hal_infineon-3.5.0

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Searched refs:CY_BLE_DEFAULT_RCB_CTRL_DIV (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/drivers/source/
D	cy_ble_clk.c	`100 #define CY_BLE_DEFAULT_RCB_CTRL_DIV (0x1UL) /* LL 8 MHz / 2 */ macro 316 rcbDivider = CY_BLE_DEFAULT_RCB_CTRL_DIV; in Cy_BLE_EcoConfigure()`
/hal_infineon-3.5.0/bless/
D	cy_ble_clk.c	`100 #define CY_BLE_DEFAULT_RCB_CTRL_DIV (0x1UL) /* LL 8 MHz / 2 */ macro 316 rcbDivider = CY_BLE_DEFAULT_RCB_CTRL_DIV; in Cy_BLE_EcoConfigure()`

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