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Searched refs:yCtl (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
Dcy_dma.c149 descriptor->yCtl = (uint32_t)config->nextDescriptor; in Cy_DMA_Descriptor_Init()
167 descriptor->yCtl = in Cy_DMA_Descriptor_Init()
188 descriptor->yCtl = (uint32_t)config->nextDescriptor; in Cy_DMA_Descriptor_Init()
223 descriptor->yCtl = 0UL; in Cy_DMA_Descriptor_DeInit()
337 descriptor->yCtl = (uint32_t)nextDescriptor; in Cy_DMA_Descriptor_SetNextDescriptor()
384 retVal = (cy_stc_dma_descriptor_t*) descriptor->yCtl; in Cy_DMA_Descriptor_GetNextDescriptor()
/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/include/
Dcy_dma.h392 uint32_t yCtl; /*!< 0x00000010 Descriptor Y loop control */ member
1348 CY_REG32_CLR_SET(descriptor->yCtl, CY_DMA_CTL_COUNT, yCount - 1UL); in Cy_DMA_Descriptor_SetYloopDataCount()
1373 return (_FLD2VAL(CY_DMA_CTL_COUNT, descriptor->yCtl) + 1UL); in Cy_DMA_Descriptor_GetYloopDataCount()
1399 CY_REG32_CLR_SET(descriptor->yCtl, CY_DMA_CTL_SRC_INCR, srcYincrement); in Cy_DMA_Descriptor_SetYloopSrcIncrement()
1424 return ((int32_t) _FLD2VAL(CY_DMA_CTL_SRC_INCR, descriptor->yCtl)); in Cy_DMA_Descriptor_GetYloopSrcIncrement()
1450 CY_REG32_CLR_SET(descriptor->yCtl, CY_DMA_CTL_DST_INCR, dstYincrement); in Cy_DMA_Descriptor_SetYloopDstIncrement()
1475 return ((int32_t) _FLD2VAL(CY_DMA_CTL_DST_INCR, descriptor->yCtl)); in Cy_DMA_Descriptor_GetYloopDstIncrement()
1896 #define DESCR_Y_CTL yCtl