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Searched refs:pllEnable (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
Dcy_pra_cfg.c1334 bool pllEnable, pathEnable, lowFreqMode; in Cy_PRA_ValidatePLL() local
1344 pllEnable = devConfig->pll0Enable; in Cy_PRA_ValidatePLL()
1352 pllEnable = devConfig->pll1Enable; in Cy_PRA_ValidatePLL()
1365 if (pllEnable) in Cy_PRA_ValidatePLL()
Dcy_pra.c1073 bool pllEnable; in Cy_PRA_ProcessCmd() local
1077 …((message->praData1) == CY_PRA_CLKPLL_1) ? (pllEnable = structCpy.pll0Enable) : (pllEnable = struc… in Cy_PRA_ProcessCmd()
1087 …Data1) == CY_PRA_CLKPLL_1) ? (structCpy.pll0Enable = pllEnable) : (structCpy.pll1Enable = pllEnabl… in Cy_PRA_ProcessCmd()