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Searched refs:pll1Enable (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
Dcy_pra_cfg.c727 …if ((CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_2) && (devConfig->pll1Enable) && (devConfig->pll1OutputMode … in Cy_PRA_GetInputSourceFreq()
1352 pllEnable = devConfig->pll1Enable; in Cy_PRA_ValidatePLL()
1443 …if ((CY_SRSS_NUM_PLL >= CY_PRA_CLKPLL_2) && (devConfig->pll1Enable) && (retStatus == CY_PRA_STATUS… in Cy_PRA_ValidateAllPLL()
2880 if ((!devConfig->pll1Enable) || /* state change from ENABLE -> DISABLE */ in Cy_PRA_SystemConfig()
2895 if((devConfig->pll1Enable) && (!Cy_SysClk_PllIsEnabled(CY_PRA_CLKPLL_2))) in Cy_PRA_SystemConfig()
Dcy_pra.c1077 …ta1) == CY_PRA_CLKPLL_1) ? (pllEnable = structCpy.pll0Enable) : (pllEnable = structCpy.pll1Enable); in Cy_PRA_ProcessCmd()
1079 …e->praData1) == CY_PRA_CLKPLL_1) ? (structCpy.pll0Enable = false) : (structCpy.pll1Enable = false); in Cy_PRA_ProcessCmd()
1087 …ta1) == CY_PRA_CLKPLL_1) ? (structCpy.pll0Enable = pllEnable) : (structCpy.pll1Enable = pllEnable); in Cy_PRA_ProcessCmd()
2143 if (structCpy.pll1Enable) in Cy_PRA_ProcessCmd()
2292 … || (((message->praData1) == CY_PRA_CLKPLL_2) && (structCpy.pll1Enable == true)) in Cy_PRA_ProcessCmd()
2309 structCpy.pll1Enable = true; in Cy_PRA_ProcessCmd()
2325 structCpy.pll1Enable = false; in Cy_PRA_ProcessCmd()
/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/include/
Dcy_pra_cfg.h156 bool pll1Enable; /**< PLL1 Enable */ member