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Searched refs:extClkPort (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/include/
Dcy_pra_cfg.h199 GPIO_PRT_Type *extClkPort; /**< External connection port */ member
312 GPIO_PRT_Type *extClkPort; /* External connection port */ member
/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
Dcy_pra_cfg.c363 if (devConfig->extClkPort != NULL) in Cy_PRA_ExtClkInit()
365 …Cy_GPIO_Pin_FastInit(devConfig->extClkPort, devConfig->extClkPinNum, CY_GPIO_DM_HIGHZ, 0UL, devCon… in Cy_PRA_ExtClkInit()
1072 (extClkPolicyPtr->extClkPort == devConfig->extClkPort) && in Cy_PRA_ValidateExtClkConfig()
1161 if (devConfig->extClkPort == NULL) in Cy_PRA_ValidateEXTClk()
Dcy_pra.c243 …GpioPort(regIndexToAddr, CY_PRA_INDX_GPIO_EXTCLK_PRT, extClkPolicyPtr->extClkPort, extClkPolicyPtr… in Cy_PRA_UpdateExtClockRegIndex()
244 …omPort(regIndexToAddr, CY_PRA_INDEX_HSIOM_EXTCLK_PRT, extClkPolicyPtr->extClkPort, extClkPolicyPtr… in Cy_PRA_UpdateExtClockRegIndex()
246 …A_InitAdjHsiomPort(regIndexToAddr, CY_PRA_INDEX_HSIOM_EXTCLK_ADJ_PRT, extClkPolicyPtr->extClkPort); in Cy_PRA_UpdateExtClockRegIndex()
585 pinList[CY_PRA_CLK_EXT_PIN_INDEX].port = extClkPolicyPtr->extClkPort; in Cy_PRA_ProcessCmd()
644 …hsiomList[CY_PRA_CLK_EXT_PIN_INDEX].port = extClkPolicyPtr->extClkPort + 1; /* Fill adjacent GPIO … in Cy_PRA_ProcessCmd()