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Searched refs:USIC_CH_PCR_SSCMode_CTQSEL1_Pos (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc_spi.h251 …XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FPPP = 0x1UL << USIC_CH_PCR_SSCMode_CTQSEL1_Pos, /**< Pe…
252 …XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FSCLK = 0x2UL << USIC_CH_PCR_SSCMode_CTQSEL1_Pos, /**< Sh…
253 …XMC_SPI_CH_INPUT_FREQ_SLAVE_SELECT_DELAY_FMCLK = 0x3UL << USIC_CH_PCR_SSCMode_CTQSEL1_Pos /**< Ma…
810 (0x02U << USIC_CH_PCR_SSCMode_CTQSEL1_Pos)); in XMC_SPI_CH_SetInterwordDelaySCLK()
/hal_infineon-3.4.0/XMCLib/devices/XMC4500/Include/
DXMC4500.h10063 #define USIC_CH_PCR_SSCMode_CTQSEL1_Pos (4UL) /*!< USIC_CH PCR_SSCMode: C… macro
/hal_infineon-3.4.0/XMCLib/devices/XMC4700/Include/
DXMC4700.h10378 #define USIC_CH_PCR_SSCMode_CTQSEL1_Pos (4UL) /*!< USIC_CH PCR_SSCMode: C… macro
/hal_infineon-3.4.0/XMCLib/devices/XMC4800/Include/
DXMC4800.h11404 #define USIC_CH_PCR_SSCMode_CTQSEL1_Pos (4UL) /*!< USIC_CH PCR_SSCMode: C… macro