SRSS_CLK_FLL_CONFIG4 (reference) in projects: hal_infineon-3.4.0

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Searched refs:SRSS_CLK_FLL_CONFIG4 (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
D	cy_sysclk.c	1452 SRSS_CLK_FLL_CONFIG4 &= ~SRSS_CLK_FLL_CONFIG4_CCO_ENABLE_Msk; in Cy_SysClk_FllDisable() 1638 …CY_REG32_CLR_SET(SRSS_CLK_FLL_CONFIG4, SRSS_CLK_FLL_CONFIG4_CCO_RANGE, (uint32_t)(config->ccoRange… in Cy_SysClk_FllManualConfigure() 1639 …CY_REG32_CLR_SET(SRSS_CLK_FLL_CONFIG4, SRSS_CLK_FLL_CONFIG4_CCO_FREQ, (uint32_t)(config->cco_Freq)… in Cy_SysClk_FllManualConfigure() 1667 tempReg = SRSS_CLK_FLL_CONFIG4; in Cy_SysClk_FllGetConfiguration() 1683 SRSS_CLK_FLL_CONFIG4 \|= SRSS_CLK_FLL_CONFIG4_CCO_ENABLE_Msk; in Cy_SysClk_FllEnable()
/hal_infineon-3.4.0/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
D	cy_device.h	`256 #define SRSS_CLK_FLL_CONFIG4 (((SRSS_V1_Type *) SRSS)->CLK_FLL_CONFIG4) macro`

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