SCU_PLL_PLLCON1_NDIV_Msk (reference) in projects: hal_infineon-3.4.0

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Searched refs:SCU_PLL_PLLCON1_NDIV_Msk (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-3.4.0/XMCLib/devices/XMC4500/Source/
D	system_XMC4500.c	`662 ndiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) + 1; in SystemCoreClockUpdate()`
/hal_infineon-3.4.0/XMCLib/devices/XMC4700/Source/
D	system_XMC4700.c	`712 ndiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) + 1; in SystemCoreClockUpdate()`
/hal_infineon-3.4.0/XMCLib/devices/XMC4800/Source/
D	system_XMC4800.c	`811 ndiv = ((SCU_PLL->PLLCON1 & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) + 1; in SystemCoreClockUpdate()`
/hal_infineon-3.4.0/XMCLib/drivers/src/
D	xmc4_scu.c	`704 …n_div = (uint32_t)((((SCU_PLL->PLLCON1) & SCU_PLL_PLLCON1_NDIV_Msk) >> SCU_PLL_PLLCON1_NDIV_Pos) … in XMC_SCU_CLOCK_GetSystemPllClockFrequency() 1689 …SCU_PLL->PLLCON1 = (uint32_t)((SCU_PLL->PLLCON1 & ~(SCU_PLL_PLLCON1_NDIV_Msk \| SCU_PLL_PLLCON1_K2D… in XMC_SCU_CLOCK_StartSystemPll()`
/hal_infineon-3.4.0/XMCLib/devices/XMC4500/Include/
D	XMC4500.h	`5304 #define SCU_PLL_PLLCON1_NDIV_Msk (0x7f00UL) /*!< SCU_PLL PLLCON1: NDIV … macro`
/hal_infineon-3.4.0/XMCLib/devices/XMC4700/Include/
D	XMC4700.h	`5639 #define SCU_PLL_PLLCON1_NDIV_Msk (0x7f00UL) /*!< SCU_PLL PLLCON1: NDIV … macro`
/hal_infineon-3.4.0/XMCLib/devices/XMC4800/Include/
D	XMC4800.h	`5871 #define SCU_PLL_PLLCON1_NDIV_Msk (0x7f00UL) /*!< SCU_PLL PLLCON1: NDIV … macro`

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