1 /***************************************************************************//**
2 * \file cy_crypto_core_hw.h
3 * \version 2.40
4 *
5 * \brief
6 *  This file provides the headers to the API for the utils
7 *  in the Crypto driver.
8 *
9 ********************************************************************************
10 * Copyright 2016-2020 Cypress Semiconductor Corporation
11 * SPDX-License-Identifier: Apache-2.0
12 *
13 * Licensed under the Apache License, Version 2.0 (the "License");
14 * you may not use this file except in compliance with the License.
15 * You may obtain a copy of the License at
16 *
17 *    http://www.apache.org/licenses/LICENSE-2.0
18 *
19 * Unless required by applicable law or agreed to in writing, software
20 * distributed under the License is distributed on an "AS IS" BASIS,
21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
22 * See the License for the specific language governing permissions and
23 * limitations under the License.
24 *******************************************************************************/
25 
26 
27 #if !defined (CY_CRYPTO_CORE_HW_H)
28 #define CY_CRYPTO_CORE_HW_H
29 
30 #include "cy_device.h"
31 
32 #if defined (CY_IP_MXCRYPTO)
33 
34 #include "cy_crypto_common.h"
35 
36 #if defined(__cplusplus)
37 extern "C" {
38 #endif
39 
40 #include "ip/cyip_crypto.h"
41 #include "ip/cyip_crypto_v2.h"
42 
43 /** \cond INTERNAL */
44 
45 /*******************************************************************************
46 *                CRYPTO
47 *******************************************************************************/
48 /* Non-changed registers */
49 #define REG_CRYPTO_CTL(base)               (((CRYPTO_Type*)(base))->CTL)
50 #define REG_CRYPTO_ERROR_STATUS0(base)     (((CRYPTO_Type*)(base))->ERROR_STATUS0)
51 #define REG_CRYPTO_ERROR_STATUS1(base)     (((CRYPTO_Type*)(base))->ERROR_STATUS1)
52 #define REG_CRYPTO_PR_LFSR_CTL0(base)      (((CRYPTO_Type*)(base))->PR_LFSR_CTL0)
53 #define REG_CRYPTO_PR_LFSR_CTL1(base)      (((CRYPTO_Type*)(base))->PR_LFSR_CTL1)
54 #define REG_CRYPTO_PR_LFSR_CTL2(base)      (((CRYPTO_Type*)(base))->PR_LFSR_CTL2)
55 #define REG_CRYPTO_TR_CTL0(base)           (((CRYPTO_Type*)(base))->TR_CTL0)
56 #define REG_CRYPTO_TR_CTL1(base)           (((CRYPTO_Type*)(base))->TR_CTL1)
57 #define REG_CRYPTO_TR_GARO_CTL(base)       (((CRYPTO_Type*)(base))->TR_GARO_CTL)
58 #define REG_CRYPTO_TR_FIRO_CTL(base)       (((CRYPTO_Type*)(base))->TR_FIRO_CTL)
59 #define REG_CRYPTO_TR_MON_CTL(base)        (((CRYPTO_Type*)(base))->TR_MON_CTL)
60 #define REG_CRYPTO_TR_MON_CMD(base)        (((CRYPTO_Type*)(base))->TR_MON_CMD)
61 #define REG_CRYPTO_TR_MON_RC_CTL(base)     (((CRYPTO_Type*)(base))->TR_MON_RC_CTL)
62 #define REG_CRYPTO_TR_MON_AP_CTL(base)     (((CRYPTO_Type*)(base))->TR_MON_AP_CTL)
63 
64 /* Changed registers in the regmap */
65 #define REG_CRYPTO_STATUS(base)            (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoStatusOffset))
66 #define REG_CRYPTO_INSTR_FF_CTL(base)      (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoIstrFfCtlOffset))
67 #define REG_CRYPTO_INSTR_FF_STATUS(base)   (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoInstrFfStatusOffset))
68 #define REG_CRYPTO_INSTR_FF_WR(base)       (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoInstrFfWrOffset))
69 #define REG_CRYPTO_AES_CTL(base)           (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoAesCtlOffset))
70 #define REG_CRYPTO_PR_RESULT(base)         (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoPrResultOffset))
71 #define REG_CRYPTO_TR_RESULT(base)         (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoTrResultOffset))
72 #define REG_CRYPTO_CRC_CTL(base)           (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoCrcCtlOffset))
73 #define REG_CRYPTO_CRC_DATA_CTL(base)      (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoCrcDataCtlOffset))
74 #define REG_CRYPTO_CRC_POL_CTL(base)       (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoCrcPolCtlOffset))
75 #define REG_CRYPTO_CRC_REM_CTL(base)       (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoCrcRemCtlOffset))
76 #define REG_CRYPTO_CRC_REM_RESULT(base)    (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoCrcRemResultOffset))
77 #define REG_CRYPTO_VU_CTL0(base)           (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoVuCtl0Offset))
78 #define REG_CRYPTO_VU_CTL1(base)           (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoVuCtl1Offset))
79 #define REG_CRYPTO_VU_STATUS(base)         (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoVuStatusOffset))
80 #define REG_CRYPTO_INTR(base)              (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoIntrOffset))
81 #define REG_CRYPTO_INTR_SET(base)          (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoIntrSetOffset))
82 #define REG_CRYPTO_INTR_MASK(base)         (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoIntrMaskOffset))
83 #define REG_CRYPTO_INTR_MASKED(base)       (*(volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoIntrMaskedOffset))
84 #define REG_CRYPTO_VU_RF_DATA(base, reg)   ( (volatile uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoVuRfDataOffset))[(reg)]
85 #define REG_CRYPTO_MEM_BUFF(base)          ( (uint32_t*)((uint32_t)(base) + cy_cryptoIP->cryptoMemBufOffset))
86 
87 /* Old V1 registers in the regmap */
88 #define REG_CRYPTO_RAM_PWRUP_DELAY(base)   (((CRYPTO_V1_Type*)(base))->RAM_PWRUP_DELAY)
89 #define REG_CRYPTO_STR_RESULT(base)        (((CRYPTO_V1_Type*)(base))->STR_RESULT)
90 #define REG_CRYPTO_SHA_CTL(base)           (((CRYPTO_V1_Type*)(base))->SHA_CTL)
91 #define REG_CRYPTO_CRC_LFSR_CTL(base)      (((CRYPTO_V1_Type*)(base))->CRC_LFSR_CTL)
92 
93 /* New V2 registers in the regmap */
94 #define REG_CRYPTO_RAM_PWR_CTL(base)       (((CRYPTO_V2_Type*)(base))->RAM_PWR_CTL)
95 #define REG_CRYPTO_RAM_PWR_DELAY_CTL(base) (((CRYPTO_V2_Type*)(base))->RAM_PWR_DELAY_CTL)
96 #define REG_CRYPTO_ECC_CTL(base)           (((CRYPTO_V2_Type*)(base))->ECC_CTL)
97 #define REG_CRYPTO_PR_MAX_CTL(base)        (((CRYPTO_V2_Type*)(base))->PR_MAX_CTL)
98 #define REG_CRYPTO_PR_CMD(base)            (((CRYPTO_V2_Type*)(base))->PR_CMD)
99 #define REG_CRYPTO_TR_CTL2(base)           (((CRYPTO_V2_Type*)(base))->TR_CTL2)
100 #define REG_CRYPTO_TR_STATUS(base)         (((CRYPTO_V2_Type*)(base))->TR_STATUS)
101 #define REG_CRYPTO_TR_CMD(base)            (((CRYPTO_V2_Type*)(base))->TR_CMD)
102 #define REG_CRYPTO_LOAD0_FF_STATUS(base)   (((CRYPTO_V2_Type*)(base))->LOAD0_FF_STATUS)
103 #define REG_CRYPTO_LOAD1_FF_STATUS(base)   (((CRYPTO_V2_Type*)(base))->LOAD1_FF_STATUS)
104 #define REG_CRYPTO_STORE_FF_STATUS(base)   (((CRYPTO_V2_Type*)(base))->STORE_FF_STATUS)
105 #define REG_CRYPTO_RESULT(base)            (((CRYPTO_V2_Type*)(base))->RESULT)
106 #define REG_CRYPTO_VU_CTL2(base)           (((CRYPTO_V2_Type*)(base))->VU_CTL2)
107 #define REG_CRYPTO_DEV_KEY_ADDR0_CTL(base) (((CRYPTO_V2_Type*)(base))->DEV_KEY_ADDR0_CTL)
108 #define REG_CRYPTO_DEV_KEY_ADDR0(base)     (((CRYPTO_V2_Type*)(base))->DEV_KEY_ADDR0)
109 #define REG_CRYPTO_DEV_KEY_ADDR1_CTL(base) (((CRYPTO_V2_Type*)(base))->DEV_KEY_ADDR1_CTL)
110 #define REG_CRYPTO_DEV_KEY_ADDR1(base)     (((CRYPTO_V2_Type*)(base))->DEV_KEY_ADDR1)
111 #define REG_CRYPTO_DEV_KEY_STATUS(base)    (((CRYPTO_V2_Type*)(base))->DEV_KEY_STATUS)
112 #define REG_CRYPTO_DEV_KEY_CTL0(base)      (((CRYPTO_V2_Type*)(base))->DEV_KEY_CTL0)
113 #define REG_CRYPTO_DEV_KEY_CTL1(base)      (((CRYPTO_V2_Type*)(base))->DEV_KEY_CTL1)
114 
115 /* The CRYPTO internal-memory buffer-size in 32-bit words. */
116 #define CY_CRYPTO_MEM_BUFF_SIZE_U32        (cy_device->cryptoMemSize)
117 /* The CRYPTO internal-memory buffer-size in bytes. */
118 #define CY_CRYPTO_MEM_BUFF_SIZE            (CY_CRYPTO_MEM_BUFF_SIZE_U32 * 4u)
119 
120 /* Device Crypto IP descriptor type */
121 typedef struct
122 {
123     /* CRYPTO register offsets */
124     uint32_t cryptoStatusOffset;
125     uint32_t cryptoIstrFfCtlOffset;
126     uint32_t cryptoInstrFfStatusOffset;
127     uint32_t cryptoInstrFfWrOffset;
128     uint32_t cryptoVuRfDataOffset;
129     uint32_t cryptoAesCtlOffset;
130     uint32_t cryptoPrResultOffset;
131     uint32_t cryptoTrResultOffset;
132     uint32_t cryptoCrcCtlOffset;
133     uint32_t cryptoCrcDataCtlOffset;
134     uint32_t cryptoCrcPolCtlOffset;
135     uint32_t cryptoCrcRemCtlOffset;
136     uint32_t cryptoCrcRemResultOffset;
137     uint32_t cryptoVuCtl0Offset;
138     uint32_t cryptoVuCtl1Offset;
139     uint32_t cryptoVuStatusOffset;
140     uint32_t cryptoIntrOffset;
141     uint32_t cryptoIntrSetOffset;
142     uint32_t cryptoIntrMaskOffset;
143     uint32_t cryptoIntrMaskedOffset;
144     uint32_t cryptoMemBufOffset;
145 } cy_stc_cryptoIP_t;
146 
147 /*******************************************************************************
148 *                   Global Variables
149 *******************************************************************************/
150 
151 extern const cy_stc_cryptoIP_t   cy_cryptoIpBlockCfgPSoC6_01;
152 extern const cy_stc_cryptoIP_t   cy_cryptoIpBlockCfgPSoC6_02;
153 extern const cy_stc_cryptoIP_t  *cy_cryptoIP;
154 
155 #define CY_CRYPTO_REGFILE_R0             (0x00u)
156 #define CY_CRYPTO_REGFILE_R1             (0x01u)
157 #define CY_CRYPTO_REGFILE_R2             (0x02u)
158 #define CY_CRYPTO_REGFILE_R3             (0x03u)
159 #define CY_CRYPTO_REGFILE_R4             (0x04u)
160 #define CY_CRYPTO_REGFILE_R5             (0x05u)
161 #define CY_CRYPTO_REGFILE_R6             (0x06u)
162 #define CY_CRYPTO_REGFILE_R7             (0x07u)
163 #define CY_CRYPTO_REGFILE_R8             (0x08u)
164 #define CY_CRYPTO_REGFILE_R9             (0x09u)
165 #define CY_CRYPTO_REGFILE_R10            (0x0Au)
166 #define CY_CRYPTO_REGFILE_R11            (0x0Bu)
167 #define CY_CRYPTO_REGFILE_R12            (0x0Cu)
168 #define CY_CRYPTO_REGFILE_R13            (0x0Du)
169 #define CY_CRYPTO_REGFILE_R14            (0x0Eu)
170 #define CY_CRYPTO_REGFILE_R15            (0x0Fu)
171 
172 #define CY_CRYPTO_RSRC0_SHIFT            (0u)
173 #define CY_CRYPTO_RSRC4_SHIFT            (4u)
174 #define CY_CRYPTO_RSRC8_SHIFT            (8u)
175 #define CY_CRYPTO_RSRC12_SHIFT           (12u)
176 #define CY_CRYPTO_RSRC13_SHIFT           (13u)
177 #define CY_CRYPTO_RSRC16_SHIFT           (16u)
178 #define CY_CRYPTO_RSRC20_SHIFT           (20u)
179 #define CY_CRYPTO_RSRC23_SHIFT           (23u)
180 #define CY_CRYPTO_RSRC26_SHIFT           (26u)
181 #define CY_CRYPTO_RSRC30_SHIFT           (30u)
182 
183 #define CY_CRYPTO_OPCODE_POS             (24u)
184 
185 /* Define bit mask for all errors interrupt sources */
186 #define CY_CRYPTO_INTR_ERROR_MASK       ((uint32_t)(CRYPTO_INTR_INSTR_OPC_ERROR_Msk | \
187                                                     CRYPTO_INTR_INSTR_CC_ERROR_Msk | \
188                                                     CRYPTO_INTR_BUS_ERROR_Msk | \
189                                                     CRYPTO_INTR_TR_AP_DETECT_ERROR_Msk | \
190                                                     CRYPTO_INTR_TR_RC_DETECT_ERROR_Msk))
191 
192 /* Define bit mask for all errors interrupt sources for interrupt setting register */
193 #define CY_CRYPTO_INTR_SET_ERROR_MASK   ((uint32_t)(CRYPTO_INTR_SET_INSTR_OPC_ERROR_Msk | \
194                                                     CRYPTO_INTR_SET_INSTR_CC_ERROR_Msk | \
195                                                     CRYPTO_INTR_SET_BUS_ERROR_Msk | \
196                                                     CRYPTO_INTR_SET_TR_AP_DETECT_ERROR_Msk | \
197                                                     CRYPTO_INTR_SET_TR_RC_DETECT_ERROR_Msk))
198 
199 /* Define bit mask for all errors interrupt sources for interrupt masking register */
200 #define CY_CRYPTO_INTR_MASK_ERROR_MASK   ((uint32_t)(CRYPTO_INTR_MASK_INSTR_OPC_ERROR_Msk | \
201                                                     CRYPTO_INTR_MASK_INSTR_CC_ERROR_Msk | \
202                                                     CRYPTO_INTR_MASK_BUS_ERROR_Msk | \
203                                                     CRYPTO_INTR_MASK_TR_AP_DETECT_ERROR_Msk | \
204                                                     CRYPTO_INTR_MASK_TR_RC_DETECT_ERROR_Msk))
205 
206 /* Define bit mask for all errors interrupt sources for interrupt masked sources check */
207 #define CY_CRYPTO_INTR_MASKED_ERROR_MASK   ((uint32_t)(CRYPTO_INTR_MASKED_INSTR_OPC_ERROR_Msk | \
208                                                     CRYPTO_INTR_MASKED_INSTR_CC_ERROR_Msk | \
209                                                     CRYPTO_INTR_MASKED_BUS_ERROR_Msk | \
210                                                     CRYPTO_INTR_MASKED_TR_AP_DETECT_ERROR_Msk | \
211                                                     CRYPTO_INTR_MASKED_TR_RC_DETECT_ERROR_Msk))
212 
213 #define CY_CRYPTO_INSTR_FIFODEPTH          (8u)
214 #define CY_CRYPTO_V1_DATA_FIFODEPTH        (8u)
215 #define CY_CRYPTO_V2_DATA_FIFODEPTH        (16u)
216 
217 #define CY_CRYPTO_INSTR_SINGLE             (1u)
218 #define CY_CRYPTO_INSTR_DOUBLE             (2u)
219 #define CY_CRYPTO_INSTR_TRIPLE             (3u)
220 
221 #define CY_CRYPTO_MIN(a,b)                 (((a) < (b)) ? (a) : (b))
222 #define CY_CRYPTO_MAX(a,b)                 (((a) > (b)) ? (a) : (b))
223 
224 typedef enum
225 {
226     CY_CRYPTO_CTL_ENABLED_DISABLED  = 0u,
227     CY_CRYPTO_CTL_ENABLED_ENABLED   = 1u,
228 } cy_en_crypto_hw_enable_t;
229 
230 /** \endcond */
231 
232 void Cy_Crypto_Core_HwInit(void);
233 
234 void Cy_Crypto_Core_ClearVuRegisters(CRYPTO_Type *base);
235 
236 void Cy_Crypto_Core_Vu_RunInstr(CRYPTO_Type *base, bool blockingMode, uint32_t instr, uint32_t params);
237 
238 /**
239 * \addtogroup group_crypto_lld_hw_functions
240 * \{
241 */
242 
243 cy_en_crypto_status_t Cy_Crypto_Core_Enable(CRYPTO_Type *base);
244 
245 cy_en_crypto_status_t Cy_Crypto_Core_Disable(CRYPTO_Type *base);
246 
247 cy_en_crypto_status_t Cy_Crypto_Core_GetLibInfo(cy_en_crypto_lib_info_t *libInfo);
248 
249 cy_en_crypto_status_t Cy_Crypto_Core_SetVuMemoryAddress(CRYPTO_Type *base, uint32_t const *vuMemoryAddr, uint32_t vuMemorySize);
250 
251 __STATIC_INLINE void * Cy_Crypto_Core_GetVuMemoryAddress(CRYPTO_Type *base);
252 
253 uint32_t Cy_Crypto_Core_GetVuMemorySize(CRYPTO_Type *base);
254 
255 void Cy_Crypto_Core_InvertEndianness(void *inArrPtr, uint32_t byteSize);
256 
257 /*******************************************************************************
258 * Function Name: Cy_Crypto_Core_IsEnabled
259 ****************************************************************************//**
260 *
261 * The function checks whether the Crypto hardware is enabled.
262 *
263 * \param base
264 * The pointer to the CRYPTO instance.
265 *
266 * \return
267 * Crypto status \ref cy_en_crypto_status_t
268 *
269 *******************************************************************************/
Cy_Crypto_Core_IsEnabled(CRYPTO_Type * base)270 __STATIC_INLINE bool Cy_Crypto_Core_IsEnabled(CRYPTO_Type *base)
271 {
272     if (cy_cryptoIP == NULL)
273     {
274         Cy_Crypto_Core_HwInit();
275     }
276 
277     return (1uL == (uint32_t)_FLD2VAL(CRYPTO_CTL_ENABLED, REG_CRYPTO_CTL(base)));
278 }
279 
280 /*******************************************************************************
281 * Function Name: Cy_Crypto_Core_GetFIFODepth
282 ****************************************************************************//**
283 *
284 * Returns the total available number of instructions in the instruction FIFO.
285 *
286 * \param base
287 * The pointer to the CRYPTO instance.
288 *
289 *******************************************************************************/
Cy_Crypto_Core_GetFIFODepth(CRYPTO_Type * base)290 __STATIC_INLINE uint8_t Cy_Crypto_Core_GetFIFODepth(CRYPTO_Type *base)
291 {
292     (void)base; /* Suppress warning */
293     return (CY_CRYPTO_INSTR_FIFODEPTH);
294 }
295 
296 /*******************************************************************************
297 * Function Name: Cy_Crypto_Core_GetFIFOUsed
298 ****************************************************************************//**
299 *
300 * Returns the number of instructions in the instruction FIFO.
301 * The value of this field ranges from 0 to 8
302 *
303 * \param base
304 * The pointer to the CRYPTO instance.
305 *
306 *******************************************************************************/
Cy_Crypto_Core_GetFIFOUsed(CRYPTO_Type * base)307 __STATIC_INLINE uint8_t Cy_Crypto_Core_GetFIFOUsed(CRYPTO_Type *base)
308 {
309     return((uint8_t)_FLD2VAL(CRYPTO_INSTR_FF_STATUS_USED, REG_CRYPTO_INSTR_FF_STATUS(base)));
310 }
311 
312 /*******************************************************************************
313 * Function Name: Cy_Crypto_Core_WaitForInstrFifoAvailable
314 *****************************************************************************//**
315 *
316 * Waits until number of entries in the instruction FIFO is less than
317 * specified number.
318 *
319 * \param base
320 * The pointer to the CRYPTO instance.
321 *
322 * \param instr
323 * The number of needed available space in the instruction FIFO.
324 *
325 *******************************************************************************/
Cy_Crypto_Core_WaitForInstrFifoAvailable(CRYPTO_Type * base,uint32_t instr)326 __STATIC_INLINE void Cy_Crypto_Core_WaitForInstrFifoAvailable(CRYPTO_Type *base, uint32_t instr)
327 {
328     while((uint32_t)(_FLD2VAL(CRYPTO_INSTR_FF_STATUS_USED, REG_CRYPTO_INSTR_FF_STATUS(base))) >= (CY_CRYPTO_INSTR_FIFODEPTH - instr))
329     {
330     }
331 }
332 
333 /*******************************************************************************
334 * Function Name: Cy_Crypto_Core_WaitForFifoAvailable
335 *****************************************************************************//**
336 *
337 * Waits until number of entries in the instruction FIFO is less than
338 * specified in EVENT_LEVEL field in FF_CTL register, an event is generated:
339 * "event" = INSTR_FF_STATUS.USED < EVENT_LEVEL.
340 * By default EVENT_LEVEL = 0;
341 *
342 * \param base
343 * The pointer to the CRYPTO instance.
344 *
345 *******************************************************************************/
Cy_Crypto_Core_WaitForFifoAvailable(CRYPTO_Type * base)346 __STATIC_INLINE void Cy_Crypto_Core_WaitForFifoAvailable(CRYPTO_Type *base)
347 {
348     while((_FLD2VAL(CRYPTO_INSTR_FF_STATUS_EVENT, REG_CRYPTO_INSTR_FF_STATUS(base))) == 0u)
349     {
350     }
351 }
352 
353 /*******************************************************************************
354 * Function Name: Cy_Crypto_Core_WaitForReady
355 *****************************************************************************//**
356 *
357 * Waits until all instruction in FIFO will be completed
358 *
359 * \param base
360 * The pointer to the CRYPTO instance.
361 *
362 *******************************************************************************/
Cy_Crypto_Core_WaitForReady(CRYPTO_Type * base)363 __STATIC_INLINE void Cy_Crypto_Core_WaitForReady(CRYPTO_Type *base)
364 {
365     while(REG_CRYPTO_STATUS(base) != 0u)
366     {
367     }
368 }
369 
370 /*******************************************************************************
371 * Function Name: Cy_Crypto_Wait_Vu_ForComplete
372 ****************************************************************************//**
373 *
374 * Waits until VU instruction will be completed
375 *
376 * \param base
377 * The pointer to the CRYPTO instance.
378 *
379 *******************************************************************************/
Cy_Crypto_Core_Vu_WaitForComplete(CRYPTO_Type * base)380 __STATIC_INLINE void Cy_Crypto_Core_Vu_WaitForComplete(CRYPTO_Type *base)
381 {
382     /* Wait until the VU instruction is complete */
383     if (CY_CRYPTO_V1)
384     {
385         while (0uL != _FLD2VAL(CRYPTO_STATUS_VU_BUSY, REG_CRYPTO_STATUS(base)))
386         {
387         }
388     }
389     else
390     {
391         while (0uL != REG_CRYPTO_STATUS(base))
392         {
393         }
394     }
395 }
396 
397 /******************************************************************************
398 * Function Name: Cy_Crypto_Core_SetInterruptMask
399 ***************************************************************************//**
400 *
401 * Masks / unmasks multiple interrupt sources.
402 *
403 * \param base
404 * The pointer to the CRYPTO instance.
405 *
406 * \param interrupts
407 * Mask bits. See definitions above.
408 *
409 ******************************************************************************/
Cy_Crypto_Core_SetInterruptMask(CRYPTO_Type * base,uint32_t interrupts)410 __STATIC_INLINE void Cy_Crypto_Core_SetInterruptMask(CRYPTO_Type *base, uint32_t interrupts)
411 {
412     REG_CRYPTO_INTR_MASK(base) = interrupts;
413 }
414 
415 /******************************************************************************
416 * Function Name: Cy_Crypto_Core_GetInterruptMask
417 ***************************************************************************//**
418 *
419 * Reports mask / unmask multiple interrupt sources.
420 *
421 * \param base
422 * The pointer to the CRYPTO instance.
423 *
424 * \return
425 * Mask bits. See definitions above.
426 *
427 ******************************************************************************/
Cy_Crypto_Core_GetInterruptMask(CRYPTO_Type const * base)428 __STATIC_INLINE uint32_t Cy_Crypto_Core_GetInterruptMask(CRYPTO_Type const *base)
429 {
430     return (REG_CRYPTO_INTR_MASK(base));
431 }
432 
433 /******************************************************************************
434 * Function Name: Cy_Crypto_Core_GetInterruptStatusMasked
435 ***************************************************************************//**
436 *
437 * Reports states of multiple enabled interrupt sources.
438 *
439 * \param base
440 * The pointer to the CRYPTO instance.
441 *
442 * \return
443 * Source bits. See definitions above.
444 *
445 *****************************************************************************/
Cy_Crypto_Core_GetInterruptStatusMasked(CRYPTO_Type const * base)446 __STATIC_INLINE uint32_t Cy_Crypto_Core_GetInterruptStatusMasked(CRYPTO_Type const *base)
447 {
448     return (REG_CRYPTO_INTR_MASKED(base));
449 }
450 
451 /******************************************************************************
452 * Function Name: Cy_Crypto_Core_GetInterruptStatus
453 ***************************************************************************//**
454 *
455 * Reports states of multiple interrupt sources.
456 *
457 * \param base
458 * The pointer to the CRYPTO instance.
459 *
460 * \return
461 * Source bits. See definitions above.
462 *
463 ******************************************************************************/
Cy_Crypto_Core_GetInterruptStatus(CRYPTO_Type * base)464 __STATIC_INLINE uint32_t Cy_Crypto_Core_GetInterruptStatus(CRYPTO_Type *base)
465 {
466     return (REG_CRYPTO_INTR(base));
467 }
468 
469 /******************************************************************************
470 * Function Name: Cy_Crypto_Core_SetInterrupt
471 ***************************************************************************//**
472 *
473 * Sets one of more interrupt sources
474 *
475 * \param base
476 * The pointer to the CRYPTO instance.
477 *
478 * \param interrupts
479 * Source bit(s)
480 *
481 ******************************************************************************/
Cy_Crypto_Core_SetInterrupt(CRYPTO_Type * base,uint32_t interrupts)482 __STATIC_INLINE void  Cy_Crypto_Core_SetInterrupt(CRYPTO_Type *base, uint32_t interrupts)
483 {
484     REG_CRYPTO_INTR_SET(base) = interrupts;
485 }
486 
487 /******************************************************************************
488 * Function Name: Cy_Crypto_Core_ClearInterrupt
489 ***************************************************************************//**
490 *
491 * Clears multiple interrupt sources.
492 *
493 * \param base
494 * The pointer to the CRYPTO instance.
495 *
496 * \param interrupts
497 * Source bit(s). See definitions above.
498 *
499 ******************************************************************************/
Cy_Crypto_Core_ClearInterrupt(CRYPTO_Type * base,uint32_t interrupts)500 __STATIC_INLINE void  Cy_Crypto_Core_ClearInterrupt(CRYPTO_Type *base, uint32_t interrupts)
501 {
502     REG_CRYPTO_INTR(base) = interrupts;
503     (void) REG_CRYPTO_INTR(base);
504 }
505 
506 /*******************************************************************************
507 * Function Name: Cy_Crypto_Core_GetVuMemoryAddress
508 ****************************************************************************//**
509 *
510 * Gets Crypto memory buffer address
511 *
512 * \param base
513 * The pointer to the CRYPTO instance.
514 *
515 * \return
516 * Current Crypto MEM_BUFF location address or NULL if Crypto IP is not enabled.
517 *
518 *******************************************************************************/
Cy_Crypto_Core_GetVuMemoryAddress(CRYPTO_Type * base)519 __STATIC_INLINE void * Cy_Crypto_Core_GetVuMemoryAddress(CRYPTO_Type *base)
520 {
521     return (cy_cryptoIP != NULL) ? (void *)REG_CRYPTO_VU_CTL1(base) : NULL;
522 }
523 
524 /** \} group_crypto_lld_hw_functions */
525 
526 #if defined(__cplusplus)
527 }
528 #endif
529 
530 #endif /* CY_IP_MXCRYPTO */
531 
532 #endif /* #if !defined (CY_CRYPTO_CORE_HW_H) */
533 
534 
535 /* [] END OF FILE */
536