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Searched refs:REG_CRYPTO_CTL (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
Dcy_crypto_core_hw.c425REG_CRYPTO_CTL(base) = (uint32_t)(_VAL2FLD(CRYPTO_CTL_PWR_MODE, CY_CRYPTO_PWR_MODE_ENABLED) | in Cy_Crypto_Core_Enable()
430REG_CRYPTO_CTL(base) &= ~(_VAL2FLD(CRYPTO_V2_CTL_ENABLED, 1uL) | _VAL2FLD(CRYPTO_V2_CTL_ECC_EN, 1… in Cy_Crypto_Core_Enable()
436 REG_CRYPTO_CTL(base) |= _VAL2FLD(CRYPTO_V2_CTL_ENABLED, 1uL); in Cy_Crypto_Core_Enable()
502 REG_CRYPTO_CTL(base) = (uint32_t)(_VAL2FLD(CRYPTO_CTL_PWR_MODE, CY_CRYPTO_PWR_MODE_OFF) | in Cy_Crypto_Core_Disable()
507 REG_CRYPTO_CTL(base) = (uint32_t)(_VAL2FLD(CRYPTO_V2_CTL_ENABLED, 0uL)); in Cy_Crypto_Core_Disable()
/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/include/
Dcy_crypto_core_hw.h49 #define REG_CRYPTO_CTL(base) (((CRYPTO_Type*)(base))->CTL) macro
277 return (1uL == (uint32_t)_FLD2VAL(CRYPTO_CTL_ENABLED, REG_CRYPTO_CTL(base))); in Cy_Crypto_Core_IsEnabled()