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Searched refs:P7_2 (Results 1 – 25 of 39) sorted by relevance

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/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.c129 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
194 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
268 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
392 {0u, 3u, P7_2, P7_2_TCPWM0_LINE3},
393 {1u, 7u, P7_2, P7_2_TCPWM1_LINE7},
Dcyhal_psoc6_04_68_qfn.c179 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
248 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
326 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
426 {0u, 3u, P7_2, P7_2_TCPWM0_LINE3},
427 {1u, 7u, P7_2, P7_2_TCPWM0_LINE263},
538 {1u, 4u, P7_2, P7_2_TCPWM0_TR_ONE_CNT_IN260},
Dcyhal_psoc6_04_64_tqfp.c181 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
252 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
332 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
432 {0u, 3u, P7_2, P7_2_TCPWM0_LINE3},
433 {1u, 7u, P7_2, P7_2_TCPWM0_LINE263},
546 {1u, 4u, P7_2, P7_2_TCPWM0_TR_ONE_CNT_IN260},
Dcyhal_psoc6_04_80_tqfp.c181 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
254 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
336 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
436 {0u, 3u, P7_2, P7_2_TCPWM0_LINE3},
437 {1u, 7u, P7_2, P7_2_TCPWM0_LINE263},
554 {1u, 4u, P7_2, P7_2_TCPWM0_TR_ONE_CNT_IN260},
Dcyhal_psoc6_03_68_qfn.c149 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
223 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
307 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
447 {0u, 3u, P7_2, P7_2_TCPWM0_LINE3},
448 {1u, 7u, P7_2, P7_2_TCPWM1_LINE7},
Dcyhal_psoc6_01_43_smt.c296 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
365 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
442 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
549 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
550 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_68_qfn_ble.c301 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
376 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
459 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
572 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
573 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_02_68_qfn.c193 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
277 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
375 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
561 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
562 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_03_100_tqfp.c158 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
240 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
333 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
478 {0u, 3u, P7_2, P7_2_TCPWM0_LINE3},
479 {1u, 7u, P7_2, P7_2_TCPWM1_LINE7},
Dcyhal_psoc6_01_80_wlcsp.c322 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
417 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
523 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
655 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
656 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_104_m_csp_ble_usb.c328 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
431 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
546 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
681 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
682 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_104_m_csp_ble.c328 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
432 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
549 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
684 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
685 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_116_bga_ble.c331 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
441 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
564 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
701 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
702 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_116_bga_usb.c331 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
438 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
557 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
692 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
693 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_02_100_wlcsp.c228 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
340 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
471 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
689 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
690 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_124_bga_sip.c333 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
448 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
577 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
715 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
716 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_02_124_bga.c241 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
371 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
523 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
759 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
760 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_02_128_tqfp.c242 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
374 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
529 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
767 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
768 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
Dcyhal_psoc6_01_124_bga.c347 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
477 {4u, 0u, P7_2, P7_2_SCB4_SPI_CLK},
623 {4u, 0u, P7_2, P7_2_SCB4_UART_RTS},
783 {0u, 5u, P7_2, P7_2_TCPWM0_LINE5},
784 {1u, 13u, P7_2, P7_2_TCPWM1_LINE13},
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.h78 P7_2 = CYHAL_GET_GPIO(CYHAL_PORT_7, 2), //!< Port 7 Pin 2 enumerator
Dcyhal_psoc6_04_68_qfn.h88 P7_2 = CYHAL_GET_GPIO(CYHAL_PORT_7, 2), //!< Port 7 Pin 2 enumerator
Dcyhal_psoc6_04_80_tqfp.h93 P7_2 = CYHAL_GET_GPIO(CYHAL_PORT_7, 2), //!< Port 7 Pin 2 enumerator
Dcyhal_psoc6_03_68_qfn.h88 P7_2 = CYHAL_GET_GPIO(CYHAL_PORT_7, 2), //!< Port 7 Pin 2 enumerator
Dcyhal_psoc6_04_64_tqfp.h88 P7_2 = CYHAL_GET_GPIO(CYHAL_PORT_7, 2), //!< Port 7 Pin 2 enumerator
Dcyhal_psoc6_03_100_tqfp.h90 P7_2 = CYHAL_GET_GPIO(CYHAL_PORT_7, 2), //!< Port 7 Pin 2 enumerator

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