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Searched refs:P2_5 (Results 1 – 25 of 28) sorted by relevance

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/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_02_68_qfn.c173 {9u, 0u, P2_5, P2_5_SCB9_I2C_SDA},
255 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
339 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
400 {9u, 0u, P2_5, P2_5_SCB9_UART_TX},
452 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
597 {0u, 0u, P2_5, P2_5_TCPWM0_LINE_COMPL0},
598 {1u, 17u, P2_5, P2_5_TCPWM1_LINE_COMPL17},
Dcyhal_psoc6_03_49_wlcsp.c178 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
243 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
322 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
422 {0u, 1u, P2_5, P2_5_TCPWM0_LINE_COMPL1},
423 {1u, 5u, P2_5, P2_5_TCPWM1_LINE_COMPL5},
Dcyhal_psoc6_03_68_qfn.c206 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
280 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
369 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
485 {0u, 1u, P2_5, P2_5_TCPWM0_LINE_COMPL1},
486 {1u, 5u, P2_5, P2_5_TCPWM1_LINE_COMPL5},
Dcyhal_psoc6_04_68_qfn.c231 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
300 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
464 {0u, 1u, P2_5, P2_5_TCPWM0_LINE_COMPL1},
465 {1u, 5u, P2_5, P2_5_TCPWM0_LINE_COMPL261},
521 {0u, 2u, P2_5, P2_5_TCPWM0_TR_ONE_CNT_IN2},
Dcyhal_psoc6_04_64_tqfp.c234 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
305 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
471 {0u, 1u, P2_5, P2_5_TCPWM0_LINE_COMPL1},
472 {1u, 5u, P2_5, P2_5_TCPWM0_LINE_COMPL261},
529 {0u, 2u, P2_5, P2_5_TCPWM0_TR_ONE_CNT_IN2},
Dcyhal_psoc6_02_100_wlcsp.c202 {9u, 0u, P2_5, P2_5_SCB9_I2C_SDA},
312 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
424 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
507 {9u, 0u, P2_5, P2_5_SCB9_UART_TX},
572 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
751 {0u, 0u, P2_5, P2_5_TCPWM0_LINE_COMPL0},
752 {1u, 17u, P2_5, P2_5_TCPWM1_LINE_COMPL17},
Dcyhal_psoc6_03_100_tqfp.c220 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
302 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
398 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
526 {0u, 1u, P2_5, P2_5_TCPWM0_LINE_COMPL1},
527 {1u, 5u, P2_5, P2_5_TCPWM1_LINE_COMPL5},
Dcyhal_psoc6_04_80_tqfp.c235 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
308 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
475 {0u, 1u, P2_5, P2_5_TCPWM0_LINE_COMPL1},
476 {1u, 5u, P2_5, P2_5_TCPWM0_LINE_COMPL261},
536 {0u, 2u, P2_5, P2_5_TCPWM0_TR_ONE_CNT_IN2},
Dcyhal_psoc6_02_124_bga.c210 {9u, 0u, P2_5, P2_5_SCB9_I2C_SDA},
333 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
463 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
562 {9u, 0u, P2_5, P2_5_SCB9_UART_TX},
631 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
831 {0u, 0u, P2_5, P2_5_TCPWM0_LINE_COMPL0},
832 {1u, 17u, P2_5, P2_5_TCPWM1_LINE_COMPL17},
Dcyhal_psoc6_02_128_tqfp.c210 {9u, 0u, P2_5, P2_5_SCB9_I2C_SDA},
335 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
467 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
568 {9u, 0u, P2_5, P2_5_SCB9_UART_TX},
637 {0u, 0u, P2_5, P2_5_SDHC0_CLK_CARD},
839 {0u, 0u, P2_5, P2_5_TCPWM0_LINE_COMPL0},
840 {1u, 17u, P2_5, P2_5_TCPWM1_LINE_COMPL17},
Dcyhal_psoc6_01_124_bga.c138 {0u, 0u, P2_5, P2_5_BLESS_MXD_DPSLP_ISOLATE_N},
439 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
569 {1u, 0u, P2_5, P2_5_SCB1_SPI_SELECT2},
855 {0u, 0u, P2_5, P2_5_TCPWM0_LINE_COMPL0},
856 {1u, 17u, P2_5, P2_5_TCPWM1_LINE_COMPL17},
/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc1_gpio_map.h190 #define P2_5 XMC_GPIO_PORT2, 5 macro
381 #define P2_5 XMC_GPIO_PORT2, 5 macro
505 #define P2_5 XMC_GPIO_PORT2, 5 macro
720 #define P2_5 XMC_GPIO_PORT2, 5 macro
916 #define P2_5 XMC_GPIO_PORT2, 5 macro
1076 #define P2_5 XMC_GPIO_PORT2, 5 macro
1381 #define P2_5 XMC_GPIO_PORT2, 5 macro
1601 #define P2_5 XMC_GPIO_PORT2, 5 macro
1848 #define P2_5 XMC_GPIO_PORT2, 5 macro
2098 #define P2_5 XMC_GPIO_PORT2, 5 macro
[all …]
Dxmc4_gpio_map.h107 #define P2_5 XMC_GPIO_PORT2, 5 macro
263 #define P2_5 XMC_GPIO_PORT2, 5 macro
381 #define P2_5 XMC_GPIO_PORT2, 5 macro
531 #define P2_5 XMC_GPIO_PORT2, 5 macro
644 #define P2_5 XMC_GPIO_PORT2, 5 macro
767 #define P2_5 XMC_GPIO_PORT2, 5 macro
864 #define P2_5 XMC_GPIO_PORT2, 5 macro
1020 #define P2_5 XMC_GPIO_PORT2, 5 macro
1145 #define P2_5 XMC_GPIO_PORT2, 5 macro
1418 #define P2_5 XMC_GPIO_PORT2, 5 macro
[all …]
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h68 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_cyw20829_56_qfn.h75 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.h64 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_04_68_qfn.h67 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_04_80_tqfp.h71 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_03_68_qfn.h67 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_04_64_tqfp.h67 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_03_100_tqfp.h67 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_02_68_qfn.h67 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_02_100_wlcsp.h72 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
Dcyhal_psoc6_02_124_bga.h74 P2_5 = CYHAL_GET_GPIO(CYHAL_PORT_2, 5), //!< Port 2 Pin 5 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c264 {0u, 0u, P2_5, P2_5_SMIF_SPIHB_CLK},

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