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Searched refs:P2_1 (Results 1 – 25 of 28) sorted by relevance

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/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.c78 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
115 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
137 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
202 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
285 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
300 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
418 {0u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL3},
419 {1u, 3u, P2_1, P2_1_TCPWM1_LINE_COMPL3},
Dcyhal_psoc6_03_68_qfn.c81 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
132 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
158 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
232 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
329 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
347 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
481 {0u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL3},
482 {1u, 3u, P2_1, P2_1_TCPWM1_LINE_COMPL3},
Dcyhal_psoc6_04_68_qfn.c114 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
164 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
188 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
257 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
347 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
460 {0u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL3},
461 {1u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL259},
517 {1u, 6u, P2_1, P2_1_TCPWM0_TR_ONE_CNT_IN262},
Dcyhal_psoc6_04_64_tqfp.c116 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
166 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
190 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
261 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
353 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
467 {0u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL3},
468 {1u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL259},
525 {1u, 6u, P2_1, P2_1_TCPWM0_TR_ONE_CNT_IN262},
Dcyhal_psoc6_02_68_qfn.c121 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
172 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
202 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
286 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
399 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
419 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
593 {0u, 6u, P2_1, P2_1_TCPWM0_LINE_COMPL6},
594 {1u, 15u, P2_1, P2_1_TCPWM1_LINE_COMPL15},
Dcyhal_psoc6_03_100_tqfp.c84 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
139 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
168 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
250 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
357 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
376 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
522 {0u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL3},
523 {1u, 3u, P2_1, P2_1_TCPWM1_LINE_COMPL3},
Dcyhal_psoc6_04_80_tqfp.c116 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
166 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
190 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
263 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
357 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
471 {0u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL3},
472 {1u, 3u, P2_1, P2_1_TCPWM0_LINE_COMPL259},
532 {1u, 6u, P2_1, P2_1_TCPWM0_TR_ONE_CNT_IN262},
Dcyhal_psoc6_02_100_wlcsp.c140 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
201 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
241 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
353 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
506 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
531 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
747 {0u, 6u, P2_1, P2_1_TCPWM0_LINE_COMPL6},
748 {1u, 15u, P2_1, P2_1_TCPWM1_LINE_COMPL15},
Dcyhal_psoc6_02_124_bga.c142 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
209 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
254 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
384 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
561 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
589 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
827 {0u, 6u, P2_1, P2_1_TCPWM0_LINE_COMPL6},
828 {1u, 15u, P2_1, P2_1_TCPWM1_LINE_COMPL15},
Dcyhal_psoc6_02_128_tqfp.c142 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
209 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
255 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
387 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
567 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
595 {0u, 1u, P2_1, P2_1_SDHC0_CARD_DAT_3TO01},
835 {0u, 6u, P2_1, P2_1_TCPWM0_LINE_COMPL6},
836 {1u, 15u, P2_1, P2_1_TCPWM1_LINE_COMPL15},
Dcyhal_psoc6_01_124_bga.c168 {0u, 0u, P2_1, P2_1_BLESS_MXD_DPSLP_RET_LDO_OL_HV},
256 {0u, 5u, P2_1, P2_1_PERI_TR_IO_INPUT5},
319 {1u, 0u, P2_1, P2_1_SCB1_I2C_SDA},
360 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
490 {1u, 0u, P2_1, P2_1_SCB1_SPI_MISO},
655 {1u, 0u, P2_1, P2_1_SCB1_UART_TX},
851 {0u, 6u, P2_1, P2_1_TCPWM0_LINE_COMPL6},
852 {1u, 15u, P2_1, P2_1_TCPWM1_LINE_COMPL15},
/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc1_gpio_map.h87 #define P2_1 XMC_GPIO_PORT2, 1 macro
186 #define P2_1 XMC_GPIO_PORT2, 1 macro
377 #define P2_1 XMC_GPIO_PORT2, 1 macro
501 #define P2_1 XMC_GPIO_PORT2, 1 macro
716 #define P2_1 XMC_GPIO_PORT2, 1 macro
914 #define P2_1 XMC_GPIO_PORT2, 1 macro
1072 #define P2_1 XMC_GPIO_PORT2, 1 macro
1262 #define P2_1 XMC_GPIO_PORT2, 1 macro
1377 #define P2_1 XMC_GPIO_PORT2, 1 macro
1599 #define P2_1 XMC_GPIO_PORT2, 1 macro
[all …]
Dxmc4_gpio_map.h103 #define P2_1 XMC_GPIO_PORT2, 1 macro
259 #define P2_1 XMC_GPIO_PORT2, 1 macro
377 #define P2_1 XMC_GPIO_PORT2, 1 macro
527 #define P2_1 XMC_GPIO_PORT2, 1 macro
640 #define P2_1 XMC_GPIO_PORT2, 1 macro
763 #define P2_1 XMC_GPIO_PORT2, 1 macro
860 #define P2_1 XMC_GPIO_PORT2, 1 macro
1016 #define P2_1 XMC_GPIO_PORT2, 1 macro
1141 #define P2_1 XMC_GPIO_PORT2, 1 macro
1414 #define P2_1 XMC_GPIO_PORT2, 1 macro
[all …]
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h64 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_cyw20829_56_qfn.h71 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.h60 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_04_68_qfn.h63 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_04_80_tqfp.h67 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_03_68_qfn.h63 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_04_64_tqfp.h63 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_03_100_tqfp.h63 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_02_68_qfn.h63 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_02_100_wlcsp.h68 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
Dcyhal_psoc6_02_124_bga.h70 P2_1 = CYHAL_GET_GPIO(CYHAL_PORT_2, 1), //!< Port 2 Pin 1 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c284 {0u, 0u, P2_1, P2_1_SMIF_SPIHB_DATA3},

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