Searched refs:CY_DMA_RETRIG_4CYC (Results 1 – 1 of 1) sorted by relevance
276 CY_DMA_RETRIG_4CYC = 1UL, /**< Retrigger after 4 Clk_Slow cycles. */ enumerator314 (CY_DMA_RETRIG_4CYC == (retrig)) || \1888 #define CY_DMA_RETDIG_4CYC (CY_DMA_RETRIG_4CYC)