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Searched refs:CY_DMA_IS_CH_NR_VALID (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/include/
Dcy_dma.h338 #define CY_DMA_IS_CH_NR_VALID(base, chNr) ((CY_DW0_BASE == (base)) ? ((chNr) < CY_DW0_CH_NR) :… macro
1509 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_SetDescriptor()
1534 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_Enable()
1558 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_Disable()
1585 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_SetPriority()
1613 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_GetPriority()
1640 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_GetCurrentDescriptor()
1668 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_GetInterruptStatus()
1695 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_GetStatus()
1719 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_ClearInterrupt()
[all …]
/hal_infineon-3.4.0/mtb-pdl-cat1/drivers/source/
Dcy_dma.c258 (CY_DMA_IS_CH_NR_VALID(base, channel))) in Cy_DMA_Channel_Init()
296 CY_ASSERT_L1(CY_DMA_IS_CH_NR_VALID(base, channel)); in Cy_DMA_Channel_DeInit()