1 /***************************************************************************//**
2 * \file cy_csd.h
3 * \version 1.10.2
4 *
5 * The header file of the CSD driver.
6 *
7 ********************************************************************************
8 * \copyright
9 * Copyright 2018-2020 Cypress Semiconductor Corporation
10 * SPDX-License-Identifier: Apache-2.0
11 *
12 * Licensed under the Apache License, Version 2.0 (the "License");
13 * you may not use this file except in compliance with the License.
14 * You may obtain a copy of the License at
15 *
16 * http://www.apache.org/licenses/LICENSE-2.0
17 *
18 * Unless required by applicable law or agreed to in writing, software
19 * distributed under the License is distributed on an "AS IS" BASIS,
20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either expressed or implied.
21 * See the License for the specific language governing permissions and
22 * limitations under the License.
23 *******************************************************************************/
24
25 /**
26 * \addtogroup group_csd
27 */
28
29 /**
30 ********************************************************************************
31 * \addtogroup group_csd
32 ********************************************************************************
33 * \{
34 *
35 * The CSD HW block enables multiple sensing capabilities on PSoC devices,
36 * including self-cap and mutual-cap capacitive touch sensing solutions,
37 * a 10-bit ADC, IDAC, and Comparator.
38 *
39 * The CapSense solution includes:
40 * * The CapSense Configurator tool, which is a configuration wizard to create
41 * and configure CapSense widgets. It can be launched in ModusToolbox
42 * from the CSD personality as well as in standalone mode.
43 * It contains separate documentation on how to create and
44 * configure widgets, parameters, and algorithm descriptions.
45 * * An API to control the design from the application program. This documentation
46 * describes the API with code snippets about how to use them.
47 * * The CapSense Tuner tool for real-time tuning, testing, and debugging,
48 * for easy and smooth design of human interfaces on customer products.
49 * The Tuner tool communicates with a device through a HW bridge and
50 * communication drivers (EzI2C, UART, etc.) and allows monitoring of
51 * widget statuses, sensor signals, detected touch positions, gestures, etc.
52 * The application program does not need to interact with the CSD driver
53 * and/or other drivers such as GPIO or SysClk directly. All of that is
54 * configured and managed by middleware.
55 *
56 * \image html capsense_solution.png "CapSense Solution" width=800px
57 * \image latex capsense_solution.png
58 *
59 * This section describes only the CSD driver. Refer to the corresponding sections
60 * for documentation of middleware supported by the CSD HW block.
61 *
62 * The CSD driver is a low-level peripheral driver that provides an interface to
63 * a complex mixed signal of the CSD HW block.
64 *
65 * The CSD driver alone does not provide system-level functions. Instead, it is
66 * used by upper-level middleware to configure the CSD HW block required by
67 * an application.
68 *
69 * The CSD HW block can support only one function at a time. To allow seamless
70 * time-multiplex implementation of functionality and to avoid conflicting access
71 * to hardware from the upper level, the CSD driver also implements a lock
72 * semaphore mechanism.
73 *
74 * The CSD driver supports re-entrance. If a device contains several
75 * CSD HW blocks, the same CSD driver is used to configure any HW block. For
76 * that, each function of the CSD driver contains a base address to define
77 * the CSD HW block to which the CSD driver communicates.
78 *
79 * For dual-core devices, the CSD driver functions can be called either by the
80 * CM0+ or CM4 cores. In case both cores need access to the CSD Driver, you
81 * should properly manage the memory access.
82 *
83 * There is no restriction on the CSD Driver usage in RTOS.
84 *
85 ********************************************************************************
86 * \section group_csd_config_usage Usage
87 ********************************************************************************
88 *
89 * The CSD driver is simple wrapper driver specifically designed to be used by higher
90 * level middleware. Hence, is highly not recommended to use CSD driver
91 * directly in the application program. To incorporate CSD HW block
92 * functionality in the application program, an associated middleware
93 * should be used.
94 *
95 * The CSD Driver can be used to implement a custom sensing solution. In such a case,
96 * the application program must acquire and lock the CSD HW block prior to
97 * accessing it.
98 *
99 * Setting up and using the CSD driver can be summed up in these four stages:
100 * * Define configuration in the config structure.
101 * * Allocate context structure variable for the driver.
102 * * Capture the CSD HW block.
103 * * Execute the action required to perform any kind of conversion.
104 *
105 * The following code snippet demonstrates how to capture the CSD HW block for
106 * custom implementation:
107 *
108 * \snippet csd/snippet/main.c snippet_Cy_CSD_Conversion
109 *
110 * The entire solution, either CapSense or CSDADC, in addition to
111 * the CSD HW block, incorporates the following instances:
112 *
113 * * \ref group_csd_config_clocks
114 * * \ref group_csd_config_refgen
115 * * \ref group_csd_config_interrupts
116 * * \ref group_csd_config_pin
117 *
118 * The CSD driver does not configure those blocks and they should be managed by
119 * an upper level. When using CapSense or CSDADC, those blocks are managed by
120 * middleware.
121 *
122 ********************************************************************************
123 * \subsection group_csd_config_clocks Clocks
124 ********************************************************************************
125 *
126 * The CSD HW block requires a peripheral clock (clk_peri) input. It can be
127 * assigned using two methods:
128 * * Using the Device Configurator (Peripheral-Clocks tab ).
129 * * Using the SysClk (System Clock) driver. Refer to \ref group_sysclk driver
130 * section for more details.
131 * If middleware is used, the clock is managed by middleware.
132 *
133 ********************************************************************************
134 * \subsection group_csd_config_pin GPIO Pins
135 ********************************************************************************
136 *
137 * Any analog-capable GPIO pin that can be connected to an analog multiplexed bus
138 * (AMUXBUS) can be connected to the CSD HW block as an input.
139 *
140 * GPIO input can be assigned to the CSD HW block using the following methods:
141 * * Using the Device Configurator (Pins tab).
142 * * Using the GPIO (General Purpose Input Output) driver. Refer to \ref group_gpio
143 * driver section.
144 *
145 * If middleware is used, pin configuration is managed by middleware. When
146 * using the CSD driver for custom implementation, the application program must
147 * manage pin connections.
148 *
149 * Each AMUXBUS can be split into multiple segments. Ensure the CSD HW block
150 * and a GPIO belong to the same bus segment or join the segments to establish
151 * connection of the GPIO to the CSD HW block.
152 *
153 * For more information about pin configuration, refer to the \ref group_gpio
154 * driver.
155 *
156 ********************************************************************************
157 * \subsection group_csd_config_refgen Reference Voltage Input
158 ********************************************************************************
159 *
160 * The CSD HW block requires a reference voltage input to generate programmable
161 * reference voltage within the CSD HW block. There are two on-chip reference
162 * sources:
163 * * VREF
164 * * AREF
165 *
166 * For more information about specification and startup of reference voltage
167 * sources, refer to the \ref group_sysanalog driver prior to making the
168 * selection.
169 *
170 ********************************************************************************
171 * \subsection group_csd_config_interrupts Interrupts
172 ********************************************************************************
173 *
174 * The CSD HW block has one interrupt that can be assigned to either the
175 * Cortex M4 or Cortex M0+ core. The CSD HW block can generate interrupts
176 * on the following events:
177 *
178 * * End of sample: when scanning of a single sensor is complete.
179 * * End of initialization: when initialization of an analog circuit is complete.
180 * * End of measurement: when conversion of an CSDADC channel is complete.
181 *
182 * Additionally, the CSD interrupt can wake the device from the Sleep power mode.
183 * The CSD HW block is powered down in the Deep Sleep or Hibernate power modes.
184 * So, it cannot be used as a wake-up source in these power modes.
185 *
186 * If a CapSense or ADC middleware is used, the interrupt service routine is managed
187 * by middleware. When using the CSD driver for custom implementation or other
188 * middleware, the application program must manage the interrupt service routine.
189 *
190 * Implement an interrupt routine and assign it to the CSD interrupt. Use the
191 * pre-defined enumeration as the interrupt source of the CSD HW block.
192 * The CSD interrupt to the NVIC is raised any time the intersection
193 * (logic AND) of the interrupt flags and the corresponding interrupt
194 * masks are non-zero. The peripheral interrupt status register should be
195 * read in the ISR to detect which condition generated the interrupt.
196 * The appropriate interrupt registers should be cleared so that
197 * subsequent interrupts can be handled.
198 *
199 * The following code snippet demonstrates how to implement a routine to handle
200 * the interrupt. The routine is called when a CSD interrupt is triggered.
201 *
202 * \snippet csd/snippet/main.c snippet_Cy_CSD_IntHandler
203 *
204 * The following code snippet demonstrates how to configure and enable
205 * the CSD interrupt:
206 *
207 * \snippet csd/snippet/main.c snippet_Cy_CSD_IntEnabling
208 *
209 * For more information, refer to the \ref group_sysint driver.
210 *
211 * Alternatively, instead of handling the interrupts, the
212 * \ref Cy_CSD_GetConversionStatus() function allows for firmware
213 * polling of the CSD block status.
214 *
215 ********************************************************************************
216 * \section group_csd_config_power_modes Power Modes
217 ********************************************************************************
218 *
219 * The CSD HW block can operate in Active and Sleep CPU power modes. It is also
220 * possible to switch between Low power and Ultra Low power system modes.
221 * In Deep Sleep and in Hibernate power modes, the CSD HW block is powered off.
222 * When the device wakes up from Deep Sleep, the CSD HW block resumes operation
223 * without the need for re-initialization. In the case of wake up from Hibernate power
224 * mode, the CSD HW block does not retain configuration and it requires
225 * re-initialization.
226 *
227 * \note
228 * 1. The CSD driver does not provide a callback function to facilitate the
229 * low-power mode transitions. The responsibility belongs to an upper
230 * level that uses the CSD HW block to ensure the CSD HW block is not
231 * busy prior to a power mode transition.
232 * 2. A power mode transition is not recommended while the CSD HW block is busy.
233 * The CSD HW block status must be checked using the Cy_CSD_GetStatus()
234 * function prior to a power mode transition. Instead, use the same power mode
235 * for active operation of the CSD HW block. This restriction is not
236 * applicable to Sleep mode and the device can seamlessly enter and exit
237 * Sleep mode while the CSD HW block is busy.
238 *
239 * \warning
240 * 1. Do not enter Deep Sleep power mode if the CSD HW block conversion is in
241 * progress. Unexpected behavior may occur.
242 * 2. Analog start up time for the CSD HW block is 25 us. Initiate
243 * any kind of conversion only after 25 us from Deep Sleep / Hibernate exit.
244 *
245 * Refer to the \ref group_syspm driver for more information about
246 * low-power mode transitions.
247 *
248 ********************************************************************************
249 * \section group_csd_more_information More Information
250 ********************************************************************************
251 *
252 * For more information, refer to the following documents:
253 *
254 * * <a href="http://www.cypress.com/trm218176"><b>Technical Reference Manual (TRM)</b></a>
255 *
256 * * <a href="https://github.com/cypresssemiconductorco/capsense">
257 * <b>CapSense Middleware Library</b></a>
258 *
259 * * <a href="https://cypresssemiconductorco.github.io/capsense/capsense_api_reference_manual/html/index.html">
260 * <b>CapSense Middleware API Reference Guide</b></a>
261 *
262 * * <a href="https://github.com/cypresssemiconductorco/csdadc">
263 * <b>CSDADC Middleware Library</b></a>
264 *
265 * * <a href="https://cypresssemiconductorco.github.io/csdadc/csdadc_api_reference_manual/html/index.html">
266 * <b>CSDADC Middleware API Reference Guide</b></a>
267 *
268 * * <a href="https://github.com/cypresssemiconductorco/csdidac">
269 * <b>CSDIDAC Middleware Library</b></a>
270 *
271 * * <a href="https://cypresssemiconductorco.github.io/csdidac/csdidac_api_reference_manual/html/index.html">
272 * <b>CSDIDAC Middleware API Reference Guide</b></a>
273 *
274 * * \ref page_getting_started "Getting Started with the PDL"
275 *
276 * * <a href="http://www.cypress.com/ds218787"><b>PSoC 63 with BLE Datasheet Programmable System-on-Chip</b></a>
277 *
278 * * <a href="http://www.cypress.com/an85951"><b>AN85951 PSoC 4 and PSoC 6 MCU CapSense Design Guide for more detail</b></a>
279 *
280 * * <a href="http://www.cypress.com/an210781"><b>AN210781 Getting Started with PSoC 6 MCU with Bluetooth Low Energy (BLE) Connectivity</b></a>
281 *
282 ********************************************************************************
283 * \section group_csd_changelog Changelog
284 ********************************************************************************
285 * <table class="doxtable">
286 * <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
287 * <tr>
288 * <td>1.10.2</td>
289 * <td>Documentation updates</td>
290 * <td>Documented MISRA 2012 violations</td>
291 * </tr>
292 * <tr>
293 * <td>1.10.1</td>
294 * <td>Documentation updates</td>
295 * <td>Update middleware references</td>
296 * </tr>
297 * <tr>
298 * <td rowspan="2">1.10</td>
299 * <td>The CSD driver sources are enclosed with the conditional compilation
300 * to ensure a successful compilation for non-CapSense-capable devices
301 * </td>
302 * <td>Compilation for non-CapSense-capable devices</td>
303 * <tr>
304 * <td>Changed the Cy_CSD_GetConversionStatus() function implementation</td>
305 * <td>Fixed defect</td>
306 * </tr>
307 * </tr>
308 * <tr>
309 * <td>1.0.1</td>
310 * <td>Documentation updates</td>
311 * <td>Improve user's experience</td>
312 * </tr>
313 * <tr>
314 * <td>1.0</td>
315 * <td>The initial version</td>
316 * <td></td>
317 * </tr>
318 * </table>
319 */
320
321 /** \} group_csd */
322
323 /**
324 ********************************************************************************
325 * \addtogroup group_csd
326 ********************************************************************************
327 * \{
328 * \defgroup group_csd_macros Macros
329 * \defgroup group_csd_functions Functions
330 * \defgroup group_csd_data_structures Data Structures
331 * \defgroup group_csd_enums Enumerated Types
332 */
333
334
335 #if !defined(CY_CSD_H)
336 #define CY_CSD_H
337
338 #include "cy_device.h"
339
340 #if defined (CY_IP_MXCSDV2)
341
342 #include <stdint.h>
343 #include <stddef.h>
344 #include "cy_syslib.h"
345
346 #if defined(__cplusplus)
347 extern "C" {
348 #endif
349
350 /**
351 * \addtogroup group_csd_macros
352 * \{
353 */
354
355 /** Driver major version */
356 #define CY_CSD_DRV_VERSION_MAJOR (1)
357
358 /** Driver minor version */
359 #define CY_CSD_DRV_VERSION_MINOR (10)
360
361
362 /******************************************************************************
363 * API Constants
364 ******************************************************************************/
365
366 /** CSD driver identifier */
367 #define CY_CSD_ID (CY_PDL_DRV_ID(0x41U))
368
369 /** Initialization macro for the driver context variable */
370 #define CY_CSD_CONTEXT_INIT_VALUE {.lockKey = CY_CSD_NONE_KEY}
371
372 /** Nominal Vref stored in SFLASH register */
373 #define CY_CSD_ADC_VREF_0P8 (800U)
374 /** Nominal Vref stored in SFLASH register */
375 #define CY_CSD_ADC_VREF_1P2 (1164U)
376 /** Nominal Vref stored in SFLASH register */
377 #define CY_CSD_ADC_VREF_1P6 (1600U)
378 /** Nominal Vref stored in SFLASH register */
379 #define CY_CSD_ADC_VREF_2P1 (2133U)
380 /** Nominal Vref stored in SFLASH register */
381 #define CY_CSD_ADC_VREF_2P6 (2560U)
382 /** One hundred percent */
383 #define CY_CSDADC_PERCENTAGE_100 (100u)
384 /** Max deviation for trim */
385 #define CY_CSDADC_VREF_TRIM_MAX_DEVIATION (20u)
386 /** Vref max gain */
387 #define CY_CSDADC_VREF_GAIN_MAX (32u)
388
389 /*******************************************************************************
390 * The CSD HW Block Registers Constants
391 *******************************************************************************/
392
393 /**
394 * \defgroup group_csd_reg_const Registers Constants
395 * \{
396 */
397
398 /** \} group_csd_reg_const */
399
400 /** \} group_csd_macros */
401
402
403 /*******************************************************************************
404 * Enumerations
405 ******************************************************************************/
406
407 /**
408 * \addtogroup group_csd_enums
409 * \{
410 */
411
412 /** CSD status definitions */
413 typedef enum
414 {
415 /** Successful */
416 CY_CSD_SUCCESS = 0x00U,
417
418 /** One or more invalid parameters */
419 CY_CSD_BAD_PARAM = CY_CSD_ID | CY_PDL_STATUS_ERROR | 0x01U,
420
421 /** The CSD HW block performs conversion */
422 CY_CSD_BUSY = CY_CSD_ID | CY_PDL_STATUS_ERROR | 0x02U,
423
424 /** The CSD HW block is captured by another middleware */
425 CY_CSD_LOCKED = CY_CSD_ID | CY_PDL_STATUS_ERROR | 0x03U
426
427 } cy_en_csd_status_t;
428
429
430 /**
431 * Definitions of upper level keys that use the driver.
432 *
433 * Each middleware has a unique key assigned. When middleware successfully
434 * captures the CSD HW block, this key is placed into the CSD driver context
435 * structure. All attempts to capture the CSD HW block by other middleware
436 * are rejected. When the first middleware releases the CSD HW block,
437 * CY_CSD_NONE_KEY is written to the lockKey variable of the CSD driver context
438 * structure and any other middleware can capture the CSD HW block.
439 */
440 typedef enum
441 {
442 /** The CSD HW block is unused and not captured by any middleware */
443 CY_CSD_NONE_KEY = 0U,
444
445 /**
446 * The CSD HW block is captured by the application program
447 * directly to implement a customer's specific case
448 */
449 CY_CSD_USER_DEFINED_KEY = 1U,
450
451 /** The CSD HW block is captured by a CapSense middleware */
452 CY_CSD_CAPSENSE_KEY = 2U,
453
454 /** The CSD HW block is captured by a ADC middleware */
455 CY_CSD_ADC_KEY = 3U,
456
457 /** The CSD HW block is captured by a IDAC middleware */
458 CY_CSD_IDAC_KEY = 4U,
459
460 /** The CSD HW block is captured by a CMP middleware */
461 CY_CSD_CMP_KEY = 5U
462
463 }cy_en_csd_key_t;
464
465 /** \} group_csd_enums */
466
467
468 /*******************************************************************************
469 * Type Definitions
470 *******************************************************************************/
471
472 /**
473 * \addtogroup group_csd_data_structures
474 * \{
475 */
476
477 /**
478 * CSD configuration structure.
479 *
480 * This structure contains all register values of the CSD HW block. This
481 * structure is provided by middleware through the Cy_CSD_Init() and
482 * Cy_CSD_Configure() functions to implement the CSD HW block supported
483 * sensing modes like self-cap / mutual-cap scanning, ADC measurement, etc.
484 */
485 typedef struct
486 {
487 uint32_t config; /**< Stores the CSD.CONFIG register value */
488 uint32_t spare; /**< Stores the CSD.SPARE register value */
489 uint32_t status; /**< Stores the CSD.STATUS register value */
490 uint32_t statSeq; /**< Stores the CSD.STAT_SEQ register value */
491 uint32_t statCnts; /**< Stores the CSD.STAT_CNTS register value */
492 uint32_t statHcnt; /**< Stores the CSD.STAT_HCNT register value */
493 uint32_t resultVal1; /**< Stores the CSD.RESULT_VAL1 register value */
494 uint32_t resultVal2; /**< Stores the CSD.RESULT_VAL2 register value */
495 uint32_t adcRes; /**< Stores the CSD.ADC_RES register value */
496 uint32_t intr; /**< Stores the CSD.INTR register value */
497 uint32_t intrSet; /**< Stores the CSD.INTR_SET register value */
498 uint32_t intrMask; /**< Stores the CSD.INTR_MASK register value */
499 uint32_t intrMasked; /**< Stores the CSD.INTR_MASKED register value */
500 uint32_t hscmp; /**< Stores the CSD.HSCMP register value */
501 uint32_t ambuf; /**< Stores the CSD.AMBUF register value */
502 uint32_t refgen; /**< Stores the CSD.REFGEN register value */
503 uint32_t csdCmp; /**< Stores the CSD.CSDCMP register value */
504 uint32_t swRes; /**< Stores the CSD.SW_RES register value */
505 uint32_t sensePeriod; /**< Stores the CSD.SENSE_PERIOD register value */
506 uint32_t senseDuty; /**< Stores the CSD.SENSE_DUTY register value */
507 uint32_t swHsPosSel; /**< Stores the CSD.SW_HS_P_SEL register value */
508 uint32_t swHsNegSel; /**< Stores the CSD.SW_HS_N_SEL register value */
509 uint32_t swShieldSel; /**< Stores the CSD.SW_SHIELD_SEL register value */
510 uint32_t swAmuxbufSel; /**< Stores the CSD.SW_AMUXBUF_SEL register value */
511 uint32_t swBypSel; /**< Stores the CSD.SW_BYP_SEL register value */
512 uint32_t swCmpPosSel; /**< Stores the CSD.SW_CMP_P_SEL register value */
513 uint32_t swCmpNegSel; /**< Stores the CSD.SW_CMP_N_SEL register value */
514 uint32_t swRefgenSel; /**< Stores the CSD.SW_REFGEN_SEL register value */
515 uint32_t swFwModSel; /**< Stores the CSD.SW_FW_MOD_SEL register value */
516 uint32_t swFwTankSel; /**< Stores the CSD.SW_FW_TANK_SEL register value */
517 uint32_t swDsiSel; /**< Stores the CSD.SW_DSI_SEL register value */
518 uint32_t ioSel; /**< Stores the CSD.IO_SEL register value */
519 uint32_t seqTime; /**< Stores the CSD.SEQ_TIME register value */
520 uint32_t seqInitCnt; /**< Stores the CSD.SEQ_INIT_CNT register value */
521 uint32_t seqNormCnt; /**< Stores the CSD.SEQ_NORM_CNT register value */
522 uint32_t adcCtl; /**< Stores the CSD.ADC_CTL register value */
523 uint32_t seqStart; /**< Stores the CSD.SEQ_START register value */
524 uint32_t idacA; /**< Stores the CSD.IDACA register value */
525 uint32_t idacB; /**< Stores the CSD.IDACB register value */
526 } cy_stc_csd_config_t;
527
528
529 /**
530 * CSD driver context structure.
531 * This structure is an internal structure of the CSD driver and should not be
532 * accessed directly by the application program.
533 */
534 typedef struct
535 {
536 /** Middleware ID that currently captured CSD */
537 cy_en_csd_key_t lockKey;
538 } cy_stc_csd_context_t;
539
540 /** \} group_csd_data_structures */
541
542 /**
543 * \addtogroup group_csd_reg_const
544 * \{
545 */
546
547
548 /** The register offset */
549 #define CY_CSD_REG_OFFSET_CONFIG (offsetof(CSD_Type, CONFIG))
550 /** The register offset */
551 #define CY_CSD_REG_OFFSET_SPARE (offsetof(CSD_Type, SPARE))
552 /** The register offset */
553 #define CY_CSD_REG_OFFSET_STATUS (offsetof(CSD_Type, STATUS))
554 /** The register offset */
555 #define CY_CSD_REG_OFFSET_STAT_SEQ (offsetof(CSD_Type, STAT_SEQ))
556 /** The register offset */
557 #define CY_CSD_REG_OFFSET_STAT_CNTS (offsetof(CSD_Type, STAT_CNTS))
558 /** The register offset */
559 #define CY_CSD_REG_OFFSET_STAT_HCNT (offsetof(CSD_Type, STAT_HCNT))
560 /** The register offset */
561 #define CY_CSD_REG_OFFSET_RESULT_VAL1 (offsetof(CSD_Type, RESULT_VAL1))
562 /** The register offset */
563 #define CY_CSD_REG_OFFSET_RESULT_VAL2 (offsetof(CSD_Type, RESULT_VAL2))
564 /** The register offset */
565 #define CY_CSD_REG_OFFSET_ADC_RES (offsetof(CSD_Type, ADC_RES))
566 /** The register offset */
567 #define CY_CSD_REG_OFFSET_INTR (offsetof(CSD_Type, INTR))
568 /** The register offset */
569 #define CY_CSD_REG_OFFSET_INTR_SET (offsetof(CSD_Type, INTR_SET))
570 /** The register offset */
571 #define CY_CSD_REG_OFFSET_INTR_MASK (offsetof(CSD_Type, INTR_MASK))
572 /** The register offset */
573 #define CY_CSD_REG_OFFSET_INTR_MASKED (offsetof(CSD_Type, INTR_MASKED))
574 /** The register offset */
575 #define CY_CSD_REG_OFFSET_HSCMP (offsetof(CSD_Type, HSCMP))
576 /** The register offset */
577 #define CY_CSD_REG_OFFSET_AMBUF (offsetof(CSD_Type, AMBUF))
578 /** The register offset */
579 #define CY_CSD_REG_OFFSET_REFGEN (offsetof(CSD_Type, REFGEN))
580 /** The register offset */
581 #define CY_CSD_REG_OFFSET_CSDCMP (offsetof(CSD_Type, CSDCMP))
582 /** The register offset */
583 #define CY_CSD_REG_OFFSET_SW_RES (offsetof(CSD_Type, SW_RES))
584 /** The register offset */
585 #define CY_CSD_REG_OFFSET_SENSE_PERIOD (offsetof(CSD_Type, SENSE_PERIOD))
586 /** The register offset */
587 #define CY_CSD_REG_OFFSET_SENSE_DUTY (offsetof(CSD_Type, SENSE_DUTY))
588 /** The register offset */
589 #define CY_CSD_REG_OFFSET_SW_HS_P_SEL (offsetof(CSD_Type, SW_HS_P_SEL))
590 /** The register offset */
591 #define CY_CSD_REG_OFFSET_SW_HS_N_SEL (offsetof(CSD_Type, SW_HS_N_SEL))
592 /** The register offset */
593 #define CY_CSD_REG_OFFSET_SW_SHIELD_SEL (offsetof(CSD_Type, SW_SHIELD_SEL))
594 /** The register offset */
595 #define CY_CSD_REG_OFFSET_SW_AMUXBUF_SEL (offsetof(CSD_Type, SW_AMUXBUF_SEL))
596 /** The register offset */
597 #define CY_CSD_REG_OFFSET_SW_BYP_SEL (offsetof(CSD_Type, SW_BYP_SEL))
598 /** The register offset */
599 #define CY_CSD_REG_OFFSET_SW_CMP_P_SEL (offsetof(CSD_Type, SW_CMP_P_SEL))
600 /** The register offset */
601 #define CY_CSD_REG_OFFSET_SW_CMP_N_SEL (offsetof(CSD_Type, SW_CMP_N_SEL))
602 /** The register offset */
603 #define CY_CSD_REG_OFFSET_SW_REFGEN_SEL (offsetof(CSD_Type, SW_REFGEN_SEL))
604 /** The register offset */
605 #define CY_CSD_REG_OFFSET_SW_FW_MOD_SEL (offsetof(CSD_Type, SW_FW_MOD_SEL))
606 /** The register offset */
607 #define CY_CSD_REG_OFFSET_SW_FW_TANK_SEL (offsetof(CSD_Type, SW_FW_TANK_SEL))
608 /** The register offset */
609 #define CY_CSD_REG_OFFSET_SW_DSI_SEL (offsetof(CSD_Type, SW_DSI_SEL))
610 /** The register offset */
611 #define CY_CSD_REG_OFFSET_IO_SEL (offsetof(CSD_Type, IO_SEL))
612 /** The register offset */
613 #define CY_CSD_REG_OFFSET_SEQ_TIME (offsetof(CSD_Type, SEQ_TIME))
614 /** The register offset */
615 #define CY_CSD_REG_OFFSET_SEQ_INIT_CNT (offsetof(CSD_Type, SEQ_INIT_CNT))
616 /** The register offset */
617 #define CY_CSD_REG_OFFSET_SEQ_NORM_CNT (offsetof(CSD_Type, SEQ_NORM_CNT))
618 /** The register offset */
619 #define CY_CSD_REG_OFFSET_ADC_CTL (offsetof(CSD_Type, ADC_CTL))
620 /** The register offset */
621 #define CY_CSD_REG_OFFSET_SEQ_START (offsetof(CSD_Type, SEQ_START))
622 /** The register offset */
623 #define CY_CSD_REG_OFFSET_IDACA (offsetof(CSD_Type, IDACA))
624 /** The register offset */
625 #define CY_CSD_REG_OFFSET_IDACB (offsetof(CSD_Type, IDACB))
626 /** \} group_csd_reg_const */
627
628 /*******************************************************************************
629 * Function Prototypes
630 *******************************************************************************/
631
632 /**
633 * \addtogroup group_csd_functions
634 * \{
635 */
636
637 cy_en_csd_status_t Cy_CSD_Init(CSD_Type * base, cy_stc_csd_config_t const * config, cy_en_csd_key_t key, cy_stc_csd_context_t * context);
638 cy_en_csd_status_t Cy_CSD_DeInit(const CSD_Type * base, cy_en_csd_key_t key, cy_stc_csd_context_t * context);
639 cy_en_csd_status_t Cy_CSD_Configure(CSD_Type * base, const cy_stc_csd_config_t * config, cy_en_csd_key_t key, const cy_stc_csd_context_t * context);
640
641 __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, const cy_stc_csd_context_t * context);
642 __STATIC_INLINE cy_en_csd_status_t Cy_CSD_GetConversionStatus(const CSD_Type * base, const cy_stc_csd_context_t * context);
643
644 uint32_t Cy_CSD_GetVrefTrim(uint32_t referenceVoltage);
645
646 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset);
647 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value);
648 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask);
649 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask);
650 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t mask, uint32_t value);
651
652 /*******************************************************************************
653 * Function Name: Cy_CSD_ReadReg
654 ****************************************************************************//**
655 *
656 * Reads value from the specified the CSD HW block register.
657 *
658 * \param base
659 * Pointer to a CSD HW block base address.
660 *
661 * \param offset
662 * Register offset relative to base address.
663 *
664 * \return
665 * Returns a value of the CSD HW block register, specified by the offset
666 * parameter.
667 *
668 *******************************************************************************/
Cy_CSD_ReadReg(const CSD_Type * base,uint32_t offset)669 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset)
670 {
671 return(* (volatile uint32_t *)((uint32_t)base + offset));
672 }
673
674
675 /*******************************************************************************
676 * Function Name: Cy_CSD_WriteReg
677 ****************************************************************************//**
678 *
679 * Writes a value to the specified CSD HW block register.
680 *
681 * \param base
682 * Pointer to a CSD HW block base address.
683 *
684 * \param offset
685 * Register offset relative to base address.
686 *
687 * \param value
688 * Value to be written to the register.
689 *
690 *******************************************************************************/
Cy_CSD_WriteReg(CSD_Type * base,uint32_t offset,uint32_t value)691 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value)
692 {
693 (* (volatile uint32_t *)((uint32_t)base + offset)) = value;
694 }
695
696
697 /*******************************************************************************
698 * Function Name: Cy_CSD_SetBits
699 ****************************************************************************//**
700 *
701 * Sets bits, specified by the Mask parameter in the CSD HW block register,
702 * specified by the Offset parameter.
703 *
704 * \param base
705 * Pointer to a CSD HW block base address.
706 *
707 * \param offset
708 * Register offset relative to base address.
709 *
710 * \param mask
711 * Mask value for register bits to be set.
712 *
713 *******************************************************************************/
Cy_CSD_SetBits(CSD_Type * base,uint32_t offset,uint32_t mask)714 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask)
715 {
716 volatile uint32_t * regPtr = (volatile uint32_t *)((uint32_t)base + offset);
717 (* regPtr) |= mask;
718 }
719
720
721 /*******************************************************************************
722 * Function Name: Cy_CSD_ClrBits
723 ****************************************************************************//**
724 *
725 * Clears bits, specified by the Mask parameter in the CSD HW block register,
726 * specified by the Offset parameter.
727 *
728 * \param base
729 * Pointer to a CSD HW block base address.
730 *
731 * \param offset
732 * Register offset relative to base address.
733 *
734 * \param mask
735 * Mask value for register bits to be cleared.
736 *
737 *******************************************************************************/
Cy_CSD_ClrBits(CSD_Type * base,uint32_t offset,uint32_t mask)738 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask)
739 {
740 volatile uint32_t * regPtr = (volatile uint32_t *)((uint32_t)base + offset);
741 (* regPtr) &= ~mask;
742 }
743
744
745 /*******************************************************************************
746 * Function Name: Cy_CSD_WriteBits
747 ****************************************************************************//**
748 *
749 * Writes field, specified by the Mask parameter with the value, specified by
750 * the Value parameter.
751 *
752 * \param base
753 * Pointer to a CSD HW block base address.
754 *
755 * \param offset
756 * Register offset relative to base address.
757 *
758 * \param mask
759 * Specifies bits to be modified.
760 *
761 * \param value
762 * Specifies a value to be written to the register.
763 *
764 *******************************************************************************/
Cy_CSD_WriteBits(CSD_Type * base,uint32_t offset,uint32_t mask,uint32_t value)765 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type * base, uint32_t offset, uint32_t mask, uint32_t value)
766 {
767 volatile uint32_t * regPtr = (volatile uint32_t *)((uint32_t)base + offset);
768 (* regPtr) = ((* regPtr) & ~mask) | (value & mask);
769 }
770
771
772 /*******************************************************************************
773 * Function Name: Cy_CSD_GetLockStatus
774 ****************************************************************************//**
775 *
776 * Verifies whether the specified CSD HW block is acquired and locked by a
777 * higher-level firmware.
778 *
779 * \param base
780 * Pointer to a CSD HW block base address.
781 *
782 * \param context
783 * The pointer to the context structure allocated by a user or middleware.
784 *
785 * \return
786 * Returns a key code. See \ref cy_en_csd_key_t.
787 *
788 * \funcusage
789 *
790 * \snippet csd/snippet/main.c snippet_Cy_CSD_CheckKey
791 *
792 *******************************************************************************/
Cy_CSD_GetLockStatus(const CSD_Type * base,const cy_stc_csd_context_t * context)793 __STATIC_INLINE cy_en_csd_key_t Cy_CSD_GetLockStatus(const CSD_Type * base, const cy_stc_csd_context_t * context)
794 {
795 (void)base;
796 return(context->lockKey);
797 }
798
799
800 /*******************************************************************************
801 * Function Name: Cy_CSD_GetConversionStatus
802 ****************************************************************************//**
803 *
804 * Verifies whether the specified CSD HW block is busy
805 * (performing scan or conversion).
806 *
807 * \param base
808 * Pointer to a CSD HW block base address.
809 *
810 * \param context
811 * The pointer to the context structure allocated by a user or middleware.
812 *
813 * \return
814 * Returns status code. See \ref cy_en_csd_status_t.
815 *
816 * \funcusage
817 *
818 * \snippet csd/snippet/main.c snippet_Cy_CSD_CheckStatus
819 *
820 *******************************************************************************/
Cy_CSD_GetConversionStatus(const CSD_Type * base,const cy_stc_csd_context_t * context)821 __STATIC_INLINE cy_en_csd_status_t Cy_CSD_GetConversionStatus(const CSD_Type * base, const cy_stc_csd_context_t * context)
822 {
823 cy_en_csd_status_t csdStatus = CY_CSD_BUSY;
824
825 (void)context;
826 if (((base->SEQ_START & CSD_SEQ_START_START_Msk) == 0u) &&
827 ((base->STAT_SEQ & (CSD_STAT_SEQ_SEQ_STATE_Msk | CSD_STAT_SEQ_ADC_STATE_Msk)) == 0u))
828 {
829 csdStatus = CY_CSD_SUCCESS;
830 }
831
832 return(csdStatus);
833 }
834 /** \} group_csd_functions */
835
836 /** \} group_csd */
837
838 #if defined(__cplusplus)
839 }
840 #endif
841
842 #endif /* CY_IP_MXCSDV2 */
843
844 #endif /* CY_CSD_H */
845
846
847 /* [] END OF FILE */
848
