Searched refs:CLC (Results 1 – 11 of 11) sorted by relevance
76 ebu->CLC = config->ebu_clk_config.raw0; in XMC_EBU_Init()77 while (((ebu->CLC & (EBU_CLC_SYNCACK_Msk | EBU_CLC_DIV2ACK_Msk | EBU_CLC_EBUDIVACK_Msk)) >> 4) != in XMC_EBU_Init()
89 FCE->CLC |= (uint32_t)FCE_CLC_DISR_Msk; in XMC_FCE_Disable()108 FCE->CLC &= (uint32_t)~FCE_CLC_DISR_Msk; in XMC_FCE_Enable()
111 dsd->CLC &= ~(uint32_t)DSD_CLC_DISR_Msk; in XMC_DSD_EnableClock()124 dsd->CLC |= (uint32_t)DSD_CLC_DISR_Msk; in XMC_DSD_DisableClock()
337 obj->CLC = CAN_CLC_DISR_Msk; in XMC_CAN_Disable()356 obj->CLC &= ~(uint32_t)CAN_CLC_DISR_Msk; in XMC_CAN_Enable()357 while (obj->CLC & CAN_CLC_DISS_Msk) in XMC_CAN_Enable()
205 global_ptr->CLC = (uint32_t)(config->clc); in XMC_VADC_GLOBAL_Init()
1047 __IO uint32_t CLC; member1143 ebu->CLC &= ~EBU_CLC_DISR_Msk; in XMC_EBU_Enable()1162 ebu->CLC |= EBU_CLC_DISR_Msk; in XMC_EBU_Disable()1191 return (uint32_t)(ebu->CLC & clk_status); in XMC_EBU_GetCLKStatus()1213 ebu->CLC |= ((clock_divide_ratio << EBU_CLC_EBUDIV_Pos) & EBU_CLC_EBUDIV_Msk); in XMC_EBU_CLKDivideRatio()
304 return (bool)(FCE->CLC &= (uint32_t)~FCE_CLC_DISS_Msk); in XMC_FCE_Get_DisableStatus()
1457 global_ptr->CLC &= ~((uint32_t)VADC_CLC_DISR_Msk); in XMC_VADC_GLOBAL_EnableModuleClock()1477 global_ptr->CLC |= (uint32_t) ((uint32_t)1 << VADC_CLC_DISR_Pos); in XMC_VADC_GLOBAL_DisableModuleClock()1496 global_ptr->CLC &= ~((uint32_t)VADC_CLC_EDIS_Msk); in XMC_VADC_GLOBAL_EnableSleepMode()1516 global_ptr->CLC |= (uint32_t) ((uint32_t)1 << VADC_CLC_EDIS_Pos); in XMC_VADC_GLOBAL_DisableSleepMode()
758 …__IO uint32_t CLC; /*!< (@ 0x50020000) Clock Control Register … member1209 …__IO uint32_t CLC; /*!< (@ 0x58008000) EBU Clock Control Register … member1716 …__IO uint32_t CLC; /*!< (@ 0x48014000) CAN Clock Control Register … member1789 …__IO uint32_t CLC; /*!< (@ 0x40004000) Clock Control Register … member1905 …__IO uint32_t CLC; /*!< (@ 0x40008000) Clock Control Register … member
773 …__IO uint32_t CLC; /*!< (@ 0x50020000) Clock Control Register … member1249 …__IO uint32_t CLC; /*!< (@ 0x58008000) EBU Clock Control Register … member1755 …__IO uint32_t CLC; /*!< (@ 0x48014000) CAN Clock Control Register … member1816 …__IO uint32_t CLC; /*!< (@ 0x40004000) Clock Control Register … member1935 …__IO uint32_t CLC; /*!< (@ 0x40008000) Clock Control Register … member
780 …__IO uint32_t CLC; /*!< (@ 0x50020000) Clock Control Register … member1257 …__IO uint32_t CLC; /*!< (@ 0x58008000) EBU Clock Control Register … member1975 …__IO uint32_t CLC; /*!< (@ 0x48014000) CAN Clock Control Register … member2036 …__IO uint32_t CLC; /*!< (@ 0x40004000) Clock Control Register … member2155 …__IO uint32_t CLC; /*!< (@ 0x40008000) Clock Control Register … member
