1 /** 2 * @file xmc_vadc_map.h 3 * @date 2016-11-17 4 * 5 * @cond 6 ********************************************************************************************************************* 7 * XMClib v2.1.24 - XMC Peripheral Driver Library 8 * 9 * Copyright (c) 2015-2019, Infineon Technologies AG 10 * All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the 13 * following conditions are met: 14 * 15 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following 19 * disclaimer in the documentation and/or other materials provided with the distribution. 20 * 21 * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote 22 * products derived from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 25 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with 33 * Infineon Technologies AG dave@infineon.com). 34 ********************************************************************************************************************* 35 * 36 * Change History 37 * -------------- 38 * 39 * 2015-02-15: 40 * - Initial version 41 * 42 * 2015-12-01: 43 * - Added: 44 * - XMC4300 device supported 45 * 46 * - Fixed: 47 * - Wrong MACRO name corrected for XMC4200/4100 devices. 48 * XMC_VADC_G3_SAMPLE renamed to XMC_VADC_G1_SAMPLE 49 * 50 * 2016-11-17: 51 * - Fixed: Add missing support for XMC47000 52 * - Fixed: Renamed XMC_CCU_41_ST2 to XMC_CCU_41_ST3 53 * - Added: New macros equivalent to th existing ones but with better naming. 54 * Old macros are kept for backward compatibility but they deprecated. 55 * - Added: ECAT support for XMC48/43 56 * 57 * @endcond 58 * 59 */ 60 61 #ifndef XMC_ADC_MAP_H 62 #define XMC_ADC_MAP_H 63 64 #ifdef __cplusplus 65 extern "C" { 66 #endif 67 68 /********************************************************************************************************************** 69 * MACROS 70 *********************************************************************************************************************/ 71 #if ( UC_FAMILY == XMC1 ) 72 73 /* Group request source Gating input connection mappings */ 74 #define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST3 */ 75 #define XMC_CCU_40_ST2 XMC_VADC_REQ_GT_B /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST2 */ 76 #define XMC_CCU_40_ST1 XMC_VADC_REQ_GT_C /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST1 */ 77 #define XMC_CCU_40_ST0 XMC_VADC_REQ_GT_D /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST0 */ 78 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 79 #define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3A */ 80 #define XMC_CCU_81_ST3 XMC_VADC_REQ_GT_F /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3 */ 81 #endif 82 #if (UC_SERIES != XMC13 && UC_SERIES != XMC11) 83 #define XMC_LEDTS0_FN XMC_VADC_REQ_GT_I /**< @deprecated use instead XMC_VADC_REQ_GT_LEDTS0_FN */ 84 #define XMC_LEDTS1_FN XMC_VADC_REQ_GT_J /**< @deprecated use instead XMC_VADC_REQ_GT_LEDTS1_FN */ 85 #endif 86 #define XMC_ERU_0_PDOUT2 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT2 */ 87 #define XMC_ERU_0_PDOUT3 XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT3 */ 88 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 89 #define XMC_CCU_80_ST0 XMC_VADC_REQ_GT_M /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST0 */ 90 #define XMC_CCU_80_ST1 XMC_VADC_REQ_GT_N /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST1 */ 91 #endif 92 #define XMC_ERU_0_PDOUT0 XMC_VADC_REQ_GT_O /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT0 */ 93 #define XMC_ERU_0_PDOUT1 XMC_VADC_REQ_GT_P /**< @deprecated use instead XMC_VADC_REQ_GT_ERU0_PDOUT1 */ 94 95 /* Group request source Trigger input connection mappings */ 96 #define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR2 */ 97 #define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR3 */ 98 #if (UC_SERIES != XMC11) 99 #define XMC_BCCU0_TRIGOUT XMC_VADC_REQ_TR_F /**< @deprecated use instead XMC_VADC_REQ_TR_BCCU0_TRIGOUT0, XMC_VADC_REQ_TR_G0_BCCU0_TRIGOUT0 or XMC_VADC_REQ_TR_G1_BCCU0_TRIGOUT1 */ 100 #endif 101 #define XMC_ERU_0_IOUT2 XMC_VADC_REQ_TR_G /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT2 */ 102 #define XMC_ERU_0_IOUT3 XMC_VADC_REQ_TR_H /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT3 */ 103 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 104 #define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR2 */ 105 #define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR3 */ 106 #endif 107 #define XMC_ERU_0_IOUT0 XMC_VADC_REQ_TR_M /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT0 */ 108 #define XMC_ERU_0_IOUT1 XMC_VADC_REQ_TR_N /**< @deprecated use instead XMC_VADC_REQ_TR_ERU0_IOUT1 */ 109 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 110 #define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O /**< @deprecated use instead XMC_VADC_REQ_TR_POSIF0_SR1 */ 111 #endif 112 #define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< @deprecated use instead XMC_VADC_REQ_TR_REQ_GT_SEL */ 113 114 /* Group request source Gating input connection mappings */ 115 #define XMC_VADC_REQ_GT_CCU40_ST3 XMC_VADC_REQ_GT_A /**< VADC Gating input A */ 116 #define XMC_VADC_REQ_GT_CCU40_ST2 XMC_VADC_REQ_GT_B /**< VADC Gating input B */ 117 #define XMC_VADC_REQ_GT_CCU40_ST1 XMC_VADC_REQ_GT_C /**< VADC Gating input C */ 118 #define XMC_VADC_REQ_GT_CCU40_ST0 XMC_VADC_REQ_GT_D /**< VADC Gating input D */ 119 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 120 #define XMC_VADC_REQ_GT_CCU80_ST3A XMC_VADC_REQ_GT_E /**< VADC Gating input E */ 121 #define XMC_VADC_REQ_GT_CCU80_ST3 XMC_VADC_REQ_GT_F /**< VADC Gating input F */ 122 #endif 123 #if (UC_SERIES != XMC13 && UC_SERIES != XMC11) 124 #define XMC_VADC_REQ_GT_LEDTS0_FN XMC_VADC_REQ_GT_I /**< VADC Gating input I */ 125 #define XMC_VADC_REQ_GT_LEDTS1_FN XMC_VADC_REQ_GT_J /**< VADC Gating input J */ 126 #endif 127 #define XMC_VADC_REQ_GT_ERU0_PDOUT2 XMC_VADC_REQ_GT_K /**< VADC Gating input K */ 128 #define XMC_VADC_REQ_GT_ERU0_PDOUT3 XMC_VADC_REQ_GT_L /**< VADC Gating input L */ 129 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 130 #define XMC_VADC_REQ_GT_CCU80_ST0 XMC_VADC_REQ_GT_M /**< VADC Gating input M */ 131 #define XMC_VADC_REQ_GT_CCU80_ST1 XMC_VADC_REQ_GT_N /**< VADC Gating input N */ 132 #endif 133 #define XMC_VADC_REQ_GT_ERU0_PDOUT0 XMC_VADC_REQ_GT_O /**< VADC Gating input O */ 134 #define XMC_VADC_REQ_GT_ERU0_PDOUT1 XMC_VADC_REQ_GT_P /**< VADC Gating input P */ 135 136 /* Group request source Trigger input connection mappings */ 137 #define XMC_VADC_REQ_TR_CCU40_SR2 XMC_VADC_REQ_TR_A /**< VADC Trigger input A */ 138 #define XMC_VADC_REQ_TR_CCU40_SR3 XMC_VADC_REQ_TR_B /**< VADC Trigger input B */ 139 #if (UC_SERIES != XMC11) 140 #define XMC_VADC_REQ_TR_BCCU0_TRIGOUT0 XMC_VADC_REQ_TR_F /**< VADC Global Background Source Trigger input F */ 141 #define XMC_VADC_REQ_TR_G0_BCCU0_TRIGOUT0 XMC_VADC_REQ_TR_F /**< VADC Group 0 Trigger input F */ 142 #define XMC_VADC_REQ_TR_G1_BCCU0_TRIGOUT1 XMC_VADC_REQ_TR_F /**< VADC Group1 Trigger input F */ 143 #endif 144 #define XMC_VADC_REQ_TR_ERU0_IOUT2 XMC_VADC_REQ_TR_G /**< VADC Trigger input G */ 145 #define XMC_VADC_REQ_TR_ERU0_IOUT3 XMC_VADC_REQ_TR_H /**< VADC Trigger input H */ 146 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 147 #define XMC_VADC_REQ_TR_CCU80_SR2 XMC_VADC_REQ_TR_I /**< VADC Trigger input I */ 148 #define XMC_VADC_REQ_TR_CCU80_SR3 XMC_VADC_REQ_TR_J /**< VADC Trigger input J */ 149 #endif 150 #define XMC_VADC_REQ_TR_ERU0_IOUT0 XMC_VADC_REQ_TR_M /**< VADC Trigger input M */ 151 #define XMC_VADC_REQ_TR_ERU0_IOUT1 XMC_VADC_REQ_TR_N /**< VADC Trigger input N */ 152 #if (UC_SERIES != XMC12 && UC_SERIES != XMC11) 153 #define XMC_VADC_REQ_TR_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Trigger input O */ 154 #endif 155 #define XMC_VADC_REQ_TR_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< VADC Trigger input P */ 156 157 #endif 158 159 #if ( UC_FAMILY == XMC4 ) 160 161 /* Group request source Gating input connection mappings */ 162 #define XMC_CCU_40_ST3 XMC_VADC_REQ_GT_A /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST3 */ 163 #define XMC_CCU_41_ST3 XMC_VADC_REQ_GT_B /**< @deprecated use instead XMC_VADC_REQ_GT_CCU41_ST3 */ 164 #define XMC_CCU_40_SR0 XMC_VADC_REQ_GT_C /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_SR0 */ 165 #define XMC_CCU_41_SR1 XMC_VADC_REQ_GT_D /**< @deprecated use instead XMC_VADC_REQ_GT_CCU41_SR1 */ 166 #define XMC_CCU_80_ST3_A XMC_VADC_REQ_GT_E /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3A */ 167 #define XMC_CCU_80_ST3_B XMC_VADC_REQ_GT_F /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_ST3B */ 168 169 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 170 #define XMC_CCU_81_ST3_A XMC_VADC_REQ_GT_G /**< @deprecated use instead XMC_VADC_REQ_GT_CCU81_ST3A */ 171 #define XMC_CCU_81_ST3_B XMC_VADC_REQ_GT_H /**< @deprecated use instead XMC_VADC_REQ_GT_CCU81_ST3B */ 172 #endif 173 174 #define XMC_DAC_0_SGN XMC_VADC_REQ_GT_I /**< @deprecated use instead XMC_VADC_REQ_GT_DAC0_SGN, XMC_VADC_REQ_GT_G0_DAC0_SGN or XMC_VADC_REQ_GT_G2_DAC0_SGN */ 175 #define XMC_DAC_1_SGN XMC_VADC_REQ_GT_I /**< @deprecated use instead XMC_VADC_REQ_GT_DAC0_SGN, XMC_VADC_REQ_GT_G1_DAC1_SGN or XMC_VADC_REQ_GT_G3_DAC1_SGN */ 176 #define XMC_LEDTS_FN XMC_VADC_REQ_GT_J /**< @deprecated use instead XMC_VADC_REQ_GT_LEDTS_FN */ 177 #define XMC_VADC_G0_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G0_VADC_G1BFLOUT0 */ 178 #define XMC_VADC_G1_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G1_VADC_G0BFLOUT0 */ 179 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 180 #define XMC_VADC_G2_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G2_VADC_G3BFLOUT0 */ 181 #define XMC_VADC_G3_BLOUT0 XMC_VADC_REQ_GT_K /**< @deprecated use instead XMC_VADC_REQ_GT_VADC_G1BFLOUT0 or XMC_VADC_REQ_GT_G3_VADC_G2BFLOUT0 */ 182 #endif 183 #define XMC_VADC_G0_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G0_VADC_G3SAMPLE */ 184 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 185 #define XMC_VADC_G1_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G1_VADC_G0SAMPLE */ 186 #define XMC_VADC_G2_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G2_VADC_G1SAMPLE */ 187 #define XMC_VADC_G3_SAMPLE XMC_VADC_REQ_GT_L /**< @deprecated use instead XMC_VADC_REQ_GT_G3_VADC_G2SAMPLE */ 188 #endif 189 #define XMC_CCU_80_SR0 XMC_VADC_REQ_GT_M /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_SR0 */ 190 #define XMC_CCU_80_SR1 XMC_VADC_REQ_GT_N /**< @deprecated use instead XMC_VADC_REQ_GT_CCU80_SR1 */ 191 #define XMC_ERU_1_PDOUT0 XMC_VADC_REQ_GT_O /**< @deprecated use instead XMC_VADC_REQ_GT_ERU1_PDOUT0 */ 192 #define XMC_ERU_1_PDOUT1 XMC_VADC_REQ_GT_P /**< @deprecated use instead XMC_VADC_REQ_GT_ERU1_PDOUT1 */ 193 194 /* Group request source Trigger input connection mappings */ 195 #define XMC_CCU_40_SR2 XMC_VADC_REQ_TR_A /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR2 */ 196 #define XMC_CCU_40_SR3 XMC_VADC_REQ_TR_B /**< @deprecated use instead XMC_VADC_REQ_TR_CCU40_SR3 */ 197 #define XMC_CCU_41_SR2 XMC_VADC_REQ_TR_C /**< @deprecated use instead XMC_VADC_REQ_TR_CCU41_SR2 */ 198 #define XMC_CCU_41_SR3 XMC_VADC_REQ_TR_D /**< @deprecated use instead XMC_VADC_REQ_TR_CCU41_SR3 */ 199 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 200 #define XMC_CCU_42_SR3 XMC_VADC_REQ_TR_E /**< @deprecated use instead XMC_VADC_REQ_TR_CCU42_SR3 */ 201 #define XMC_CCU_43_SR3 XMC_VADC_REQ_TR_F /**< @deprecated use instead XMC_VADC_REQ_TR_CCU43_SR3 */ 202 #endif 203 #define XMC_CCU_80_SR2 XMC_VADC_REQ_TR_I /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR2 */ 204 #define XMC_CCU_80_SR3 XMC_VADC_REQ_TR_J /**< @deprecated use instead XMC_VADC_REQ_TR_CCU80_SR3 */ 205 #define XMC_CCU_81_SR2 XMC_VADC_REQ_TR_K /**< @deprecated use instead XMC_VADC_REQ_TR_CCU81_SR2 */ 206 #define XMC_CCU_81_SR3 XMC_VADC_REQ_TR_L /**< @deprecated use instead XMC_VADC_REQ_TR_CCU81_SR3 */ 207 #define XMC_ERU_1_IOUT0 XMC_VADC_REQ_TR_M /**< @deprecated use instead XMC_VADC_REQ_TR_ERU1_IOUT0 */ 208 #define XMC_ERU_1_IOUT1 XMC_VADC_REQ_TR_N /**< @deprecated use instead XMC_VADC_REQ_TR_ERU1_IOUT1, XMC_VADC_REQ_TR_G0_ERU1_IOUT1 or XMC_VADC_REQ_TR_G1_ERU1_IOUT1 */ 209 #define XMC_ERU_1_IOUT2 XMC_VADC_REQ_TR_N /**< @deprecated use instead XMC_VADC_REQ_TR_ERU1_IOUT1, XMC_VADC_REQ_TR_G2_ERU1_IOUT2 or XMC_VADC_REQ_TR_G3_ERU1_IOUT1 */ 210 #if ( (UC_SERIES != XMC43) ) 211 #define XMC_POSIF_0_SR1 XMC_VADC_REQ_TR_O /**< @deprecated use instead XMC_VADC_REQ_TR_POSIF0_SR1, XMC_VADC_REQ_TR_G0_POSIF0_SR1 or XMC_VADC_REQ_TR_G2_POSIF0_SR1 */ 212 #endif 213 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 214 #define XMC_POSIF_1_SR1 XMC_VADC_REQ_TR_O /**< @deprecated use instead XMC_VADC_REQ_TR_POSIF0_SR1, XMC_VADC_REQ_TR_G1_POSIF0_SR1 or XMC_VADC_REQ_TR_G3_POSIF0_SR1 */ 215 #endif 216 #define XMC_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< @deprecated use instead XMC_VADC_REQ_GT_CCU40_ST3 */ 217 218 /* Group request source Gating input connection mappings */ 219 #define XMC_VADC_REQ_GT_CCU40_ST3 XMC_VADC_REQ_GT_A /**< VADC Gating input A */ 220 #define XMC_VADC_REQ_GT_CCU41_ST3 XMC_VADC_REQ_GT_B /**< VADC Gating input B */ 221 #define XMC_VADC_REQ_GT_CCU40_SR0 XMC_VADC_REQ_GT_C /**< VADC Gating input C */ 222 #define XMC_VADC_REQ_GT_CCU41_SR1 XMC_VADC_REQ_GT_D /**< VADC Gating input D */ 223 #define XMC_VADC_REQ_GT_CCU80_ST3A XMC_VADC_REQ_GT_E /**< VADC Gating input E */ 224 #define XMC_VADC_REQ_GT_CCU80_ST3B XMC_VADC_REQ_GT_F /**< VADC Gating input F */ 225 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 226 #define XMC_VADC_REQ_GT_CCU81_ST3A XMC_VADC_REQ_GT_G /**< VADC Gating input G */ 227 #define XMC_VADC_REQ_GT_CCU81_ST3B XMC_VADC_REQ_GT_H /**< VADC Gating input H */ 228 #endif 229 #define XMC_VADC_REQ_GT_DAC0_SGN XMC_VADC_REQ_GT_I /**< VADC Global Background Source Gating input I */ 230 #define XMC_VADC_REQ_GT_G0_DAC0_SGN XMC_VADC_REQ_GT_I /**< VADC Group 0 Gating input I */ 231 #define XMC_VADC_REQ_GT_G1_DAC1_SGN XMC_VADC_REQ_GT_I /**< VADC Group 1 Gating input I */ 232 #define XMC_VADC_REQ_GT_G2_DAC0_SGN XMC_VADC_REQ_GT_I /**< VADC Group 2 Gating input I */ 233 #define XMC_VADC_REQ_GT_G3_DAC1_SGN XMC_VADC_REQ_GT_I /**< VADC Group 3 Gating input I */ 234 #define XMC_VADC_REQ_GT_LEDTS_FN XMC_VADC_REQ_GT_J /**< VADC Gating input J */ 235 #define XMC_VADC_REQ_GT_VADC_G1BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Global Background Source Gating input K */ 236 #define XMC_VADC_REQ_GT_G0_VADC_G1BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 0 Gating input K */ 237 #define XMC_VADC_REQ_GT_G1_VADC_G0BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 1 Gating input K */ 238 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 239 #define XMC_VADC_REQ_GT_G2_VADC_G3BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 2 Gating input K */ 240 #define XMC_VADC_REQ_GT_G3_VADC_G2BFLOUT0 XMC_VADC_REQ_GT_K /**< VADC Group 3 Gating input K */ 241 #endif 242 #define XMC_VADC_REQ_GT_G0_VADC_G3SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 0 Gating input L */ 243 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 244 #define XMC_VADC_REQ_GT_G1_VADC_G0SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 1 Gating input L */ 245 #define XMC_VADC_REQ_GT_G2_VADC_G1SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 2 Gating input L */ 246 #define XMC_VADC_REQ_GT_G3_VADC_G2SAMPLE XMC_VADC_REQ_GT_L /**< VADC Group 3 Gating input L */ 247 #endif 248 #define XMC_VADC_REQ_GT_CCU80_SR0 XMC_VADC_REQ_GT_M /**< VADC Gating input M */ 249 #define XMC_VADC_REQ_GT_CCU80_SR1 XMC_VADC_REQ_GT_N /**< VADC Gating input N */ 250 #define XMC_VADC_REQ_GT_ERU1_PDOUT0 XMC_VADC_REQ_GT_O /**< VADC Gating input O */ 251 #define XMC_VADC_REQ_GT_ERU1_PDOUT1 XMC_VADC_REQ_GT_P /**< VADC Gating input P */ 252 253 /* Group request source Trigger input connection mappings */ 254 #define XMC_VADC_REQ_TR_CCU40_SR2 XMC_VADC_REQ_TR_A /**< VADC Trigger input A */ 255 #define XMC_VADC_REQ_TR_CCU40_SR3 XMC_VADC_REQ_TR_B /**< VADC Trigger input B */ 256 #define XMC_VADC_REQ_TR_CCU41_SR2 XMC_VADC_REQ_TR_C /**< VADC Trigger input C */ 257 #define XMC_VADC_REQ_TR_CCU41_SR3 XMC_VADC_REQ_TR_D /**< VADC Trigger input D */ 258 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 259 #define XMC_VADC_REQ_TR_CCU42_SR3 XMC_VADC_REQ_TR_E /**< VADC Trigger input E */ 260 #define XMC_VADC_REQ_TR_CCU43_SR3 XMC_VADC_REQ_TR_F /**< VADC Trigger input F */ 261 #endif 262 #if ((UC_SERIES == XMC48) || (UC_SERIES == XMC43)) 263 #define XMC_VADC_REQ_TR_ECAT_SYNC0 XMC_VADC_REQ_TR_G /**< VADC Trigger input G */ 264 #define XMC_VADC_REQ_TR_ECAT_SYNC1 XMC_VADC_REQ_TR_H /**< VADC Trigger input H */ 265 #endif 266 #define XMC_VADC_REQ_TR_CCU80_SR2 XMC_VADC_REQ_TR_I /**< VADC Trigger input I */ 267 #define XMC_VADC_REQ_TR_CCU80_SR3 XMC_VADC_REQ_TR_J /**< VADC Trigger input J */ 268 #define XMC_VADC_REQ_TR_CCU81_SR2 XMC_VADC_REQ_TR_K /**< VADC Trigger input K */ 269 #define XMC_VADC_REQ_TR_CCU81_SR3 XMC_VADC_REQ_TR_L /**< VADC Trigger input L */ 270 #define XMC_VADC_REQ_TR_ERU1_IOUT0 XMC_VADC_REQ_TR_M /**< VADC Trigger input M */ 271 #define XMC_VADC_REQ_TR_ERU1_IOUT1 XMC_VADC_REQ_TR_M /**< VADC Global Background Source Trigger input N */ 272 #define XMC_VADC_REQ_TR_G0_ERU1_IOUT1 XMC_VADC_REQ_TR_N /**< VADC Group 0 Trigger input N */ 273 #define XMC_VADC_REQ_TR_G1_ERU1_IOUT1 XMC_VADC_REQ_TR_N /**< VADC Group 1 Trigger input N */ 274 #define XMC_VADC_REQ_TR_G2_ERU1_IOUT2 XMC_VADC_REQ_TR_N /**< VADC Group 2 Trigger input N */ 275 #define XMC_VADC_REQ_TR_G3_ERU1_IOUT2 XMC_VADC_REQ_TR_N /**< VADC Group 3 Trigger input N */ 276 #if ( (UC_SERIES != XMC43) ) 277 #define XMC_VADC_REQ_TR_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Global Background Source Trigger input O */ 278 #define XMC_VADC_REQ_TR_G0_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 0 Trigger input O */ 279 #define XMC_VADC_REQ_TR_G1_POSIF1_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 1 Trigger input O */ 280 #endif 281 #if ( (UC_SERIES != XMC43) && (UC_SERIES != XMC42) && (UC_SERIES != XMC41)) 282 #define XMC_VADC_REQ_TR_G2_POSIF0_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 2 Trigger input O */ 283 #define XMC_VADC_REQ_TR_G3_POSIF1_SR1 XMC_VADC_REQ_TR_O /**< VADC Group 3 Trigger input O */ 284 #endif 285 #define XMC_VADC_REQ_TR_REQ_GT_SEL XMC_VADC_REQ_TR_P /**< VADC Trigger input P */ 286 287 #endif 288 289 #ifdef __cplusplus 290 } 291 #endif 292 293 #endif 294
