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Searched refs:SCU_CLK_SYSCLKCR_SYSDIV_Msk (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-2.7.6/XMCLib/devices/XMC4500/Source/
Dsystem_XMC4500.c682 temp = temp / ((SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSDIV_Msk) + 1); in SystemCoreClockUpdate()
/hal_infineon-2.7.6/XMCLib/drivers/src/
Dxmc4_scu.c971 (divider <= (SCU_CLK_SYSCLKCR_SYSDIV_Msk + 1UL)) ); in XMC_SCU_CLOCK_SetSystemClockDivider()
973 SCU_CLK->SYSCLKCR = (SCU_CLK->SYSCLKCR & ((uint32_t)~SCU_CLK_SYSCLKCR_SYSDIV_Msk)) | in XMC_SCU_CLOCK_SetSystemClockDivider()
/hal_infineon-2.7.6/XMCLib/drivers/inc/
Dxmc4_scu.h2066 …return (uint32_t)((SCU_CLK->SYSCLKCR & SCU_CLK_SYSCLKCR_SYSDIV_Msk) >> SCU_CLK_SYSCLKCR_SYSDIV_Pos… in XMC_SCU_CLOCK_GetSystemClockDivider()
/hal_infineon-2.7.6/XMCLib/devices/XMC4500/Include/
DXMC4500.h5152 #define SCU_CLK_SYSCLKCR_SYSDIV_Msk (0xffUL) /*!< SCU_CLK SYSCLKCR: SYSD… macro