Searched refs:timerx (Results 1 – 8 of 8) sorted by relevance
50 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00000000U) /*!< TIMER cont… argument51 #define TIMER_CTL1(timerx) REG32((timerx) + 0x00000004U) /*!< TIMER cont… argument52 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x00000008U) /*!< TIMER slav… argument53 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0000000CU) /*!< TIMER DMA … argument54 #define TIMER_INTF(timerx) REG32((timerx) + 0x00000010U) /*!< TIMER inte… argument55 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x00000014U) /*!< TIMER soft… argument56 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x00000018U) /*!< TIMER chan… argument57 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x0000001CU) /*!< TIMER chan… argument58 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x00000020U) /*!< TIMER chan… argument59 #define TIMER_CNT(timerx) REG32((timerx) + 0x00000024U) /*!< TIMER coun… argument[all …]
49 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00U) /*!< TIMER control regis… argument50 #define TIMER_CTL1(timerx) REG32((timerx) + 0x04U) /*!< TIMER control regis… argument51 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x08U) /*!< TIMER slave mode co… argument52 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0CU) /*!< TIMER DMA and inter… argument53 #define TIMER_INTF(timerx) REG32((timerx) + 0x10U) /*!< TIMER interrupt fla… argument54 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x14U) /*!< TIMER software even… argument55 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x18U) /*!< TIMER channel contr… argument56 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… argument57 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… argument58 #define TIMER_CNT(timerx) REG32((timerx) + 0x24U) /*!< TIMER counter regis… argument[all …]
60 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00U) /*!< TIMER control regis… argument61 #define TIMER_CTL1(timerx) REG32((timerx) + 0x04U) /*!< TIMER control regis… argument62 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x08U) /*!< TIMER slave mode co… argument63 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0CU) /*!< TIMER DMA and inter… argument64 #define TIMER_INTF(timerx) REG32((timerx) + 0x10U) /*!< TIMER interrupt fla… argument65 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x14U) /*!< TIMER software even… argument66 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x18U) /*!< TIMER channel contr… argument67 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… argument68 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… argument69 #define TIMER_CNT(timerx) REG32((timerx) + 0x24U) /*!< TIMER counter regis… argument[all …]
57 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00U) /*!< TIMER control regis… argument58 #define TIMER_CTL1(timerx) REG32((timerx) + 0x04U) /*!< TIMER control regis… argument59 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x08U) /*!< TIMER slave mode co… argument60 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0CU) /*!< TIMER DMA and inter… argument61 #define TIMER_INTF(timerx) REG32((timerx) + 0x10U) /*!< TIMER interrupt fla… argument62 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x14U) /*!< TIMER software even… argument63 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x18U) /*!< TIMER channel contr… argument64 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… argument65 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… argument66 #define TIMER_CNT(timerx) REG32((timerx) + 0x24U) /*!< TIMER counter regis… argument[all …]
55 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00000000U) /*!< TIMER control r… argument56 #define TIMER_CTL1(timerx) REG32((timerx) + 0x00000004U) /*!< TIMER control r… argument57 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x00000008U) /*!< TIMER slave mod… argument58 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0000000CU) /*!< TIMER DMA and i… argument59 #define TIMER_INTF(timerx) REG32((timerx) + 0x00000010U) /*!< TIMER interrupt… argument60 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x00000014U) /*!< TIMER software … argument61 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x00000018U) /*!< TIMER channel c… argument62 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x0000001CU) /*!< TIMER channel c… argument63 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x00000020U) /*!< TIMER channel c… argument64 #define TIMER_CNT(timerx) REG32((timerx) + 0x00000024U) /*!< TIMER counter r… argument[all …]
59 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00U) /*!< TIMER control regis… argument60 #define TIMER_CTL1(timerx) REG32((timerx) + 0x04U) /*!< TIMER control regis… argument61 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x08U) /*!< TIMER slave mode co… argument62 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0CU) /*!< TIMER DMA and inter… argument63 #define TIMER_INTF(timerx) REG32((timerx) + 0x10U) /*!< TIMER interrupt fla… argument64 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x14U) /*!< TIMER software even… argument65 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x18U) /*!< TIMER channel contr… argument66 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… argument67 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… argument68 #define TIMER_CNT(timerx) REG32((timerx) + 0x24U) /*!< TIMER counter regis… argument[all …]
51 #define TIMER_CTL0(timerx) REG32((timerx) + 0x00U) /*!< TIMER control regis… argument52 #define TIMER_CTL1(timerx) REG32((timerx) + 0x04U) /*!< TIMER control regis… argument53 #define TIMER_SMCFG(timerx) REG32((timerx) + 0x08U) /*!< TIMER slave mode co… argument54 #define TIMER_DMAINTEN(timerx) REG32((timerx) + 0x0CU) /*!< TIMER DMA and inter… argument55 #define TIMER_INTF(timerx) REG32((timerx) + 0x10U) /*!< TIMER interrupt fla… argument56 #define TIMER_SWEVG(timerx) REG32((timerx) + 0x14U) /*!< TIMER software even… argument57 #define TIMER_CHCTL0(timerx) REG32((timerx) + 0x18U) /*!< TIMER channel contr… argument58 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… argument59 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… argument60 #define TIMER_CNT(timerx) REG32((timerx) + 0x24U) /*!< TIMER counter regis… argument[all …]
