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Searched refs:syn_clk_division (Results 1 – 8 of 8) sorted by relevance

/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_exmc.c104 exmc_norsram_init_struct->read_write_timing->syn_clk_division = EXMC_SYN_CLOCK_RATIO_16_CLK; in exmc_norsram_struct_para_init()
166 exmc_norsram_init_struct->read_write_timing->syn_clk_division | in exmc_norsram_init()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_exmc.c140 exmc_norsram_init_struct->read_write_timing->syn_clk_division = EXMC_SYN_CLOCK_RATIO_16_CLK; in exmc_norsram_struct_para_init()
217 exmc_norsram_init_struct->read_write_timing->syn_clk_division | in exmc_norsram_init()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_exmc.c140 exmc_norsram_init_struct->read_write_timing->syn_clk_division = EXMC_SYN_CLOCK_RATIO_16_CLK; in exmc_norsram_struct_para_init()
203 exmc_norsram_init_struct->read_write_timing->syn_clk_division | in exmc_norsram_init()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_exmc.h92 …uint32_t syn_clk_division; /*!< configure the clock divid… member
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_exmc.c168 exmc_norsram_init_struct->read_write_timing->syn_clk_division = EXMC_SYN_CLOCK_RATIO_16_CLK; in exmc_norsram_struct_para_init()
245 exmc_norsram_init_struct->read_write_timing->syn_clk_division | in exmc_norsram_init()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_exmc.h162 …uint32_t syn_clk_division; /*!< configure the clock divid… member
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_exmc.h162 …uint32_t syn_clk_division; /*!< configure the clock divid… member
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_exmc.h254 …uint32_t syn_clk_division; /*!< configure the clock divid… member