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Searched refs:interrupt_enable (Results 1 – 14 of 14) sorted by relevance

/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_mfcom.c585 uint32_t interrupt_flag, interrupt_enable; in mfcom_shifter_interrupt_flag_get() local
588 interrupt_enable = MFCOM_SSIEN & ((uint32_t)1U << shifter); in mfcom_shifter_interrupt_flag_get()
591 if(interrupt_flag & interrupt_enable){ in mfcom_shifter_interrupt_flag_get()
607 uint32_t interrupt_flag, interrupt_enable; in mfcom_shifter_error_interrupt_flag_get() local
610 interrupt_enable = MFCOM_SEIEN & ((uint32_t)1U << shifter); in mfcom_shifter_error_interrupt_flag_get()
613 if(interrupt_flag & interrupt_enable){ in mfcom_shifter_error_interrupt_flag_get()
629 uint32_t interrupt_flag, interrupt_enable; in mfcom_timer_interrupt_flag_get() local
632 interrupt_enable = MFCOM_TMSIEN & ((uint32_t)1U << timer); in mfcom_timer_interrupt_flag_get()
635 if(interrupt_flag & interrupt_enable){ in mfcom_timer_interrupt_flag_get()
Dgd32a50x_dma.c583 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
588 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
592 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
596 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
602 if(interrupt_flag && interrupt_enable) { in dma_interrupt_flag_get()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_dma.c818 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
824 interrupt_enable = DMA_CHFCTL(dma_periph, channelx) & DMA_CHXFCTL_FEEIE; in dma_interrupt_flag_get()
828 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_SDEIE; in dma_interrupt_flag_get()
832 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_TAEIE; in dma_interrupt_flag_get()
836 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
840 interrupt_enable = (DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE); in dma_interrupt_flag_get()
850 interrupt_enable = DMA_CHFCTL(dma_periph, channelx) & DMA_CHXFCTL_FEEIE; in dma_interrupt_flag_get()
854 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_SDEIE; in dma_interrupt_flag_get()
858 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_TAEIE; in dma_interrupt_flag_get()
862 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
[all …]
Dgd32f4xx_exmc.c1184 uint32_t status = 0x00000000U, interrupt_enable = 0x00000000U, interrupt_state = 0x00000000U; in exmc_interrupt_flag_get() local
1196 interrupt_enable = (status & interrupt); in exmc_interrupt_flag_get()
1198 if((interrupt_enable) && (interrupt_state)) { in exmc_interrupt_flag_get()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_dma.c483 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
488 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
492 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
496 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
502 if(interrupt_flag && interrupt_enable){ in dma_interrupt_flag_get()
Dgd32f3x0_cec.c464 uint32_t interrupt_enable = 0U,interrupt_flag = 0U; in cec_interrupt_flag_get() local
466 interrupt_enable = (CEC_INTEN & flag); in cec_interrupt_flag_get()
467 if(interrupt_flag && interrupt_enable){ in cec_interrupt_flag_get()
Dgd32f3x0_tsi.c534 uint32_t interrupt_enable = 0U,interrupt_flag = 0U; in tsi_interrupt_flag_get() local
536 interrupt_enable = (TSI_INTEN & flag); in tsi_interrupt_flag_get()
537 if(interrupt_flag && interrupt_enable){ in tsi_interrupt_flag_get()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_dma.c612 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
618 interrupt_enable = DMA_CHCTL(dma_periph, (uint32_t)channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
623 interrupt_enable = DMA_CHCTL(dma_periph, (uint32_t)channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
628 interrupt_enable = DMA_CHCTL(dma_periph, (uint32_t)channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
635 if(interrupt_flag && interrupt_enable){ in dma_interrupt_flag_get()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_dma.c677 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
686 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
690 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
694 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
700 if(interrupt_flag && interrupt_enable){ in dma_interrupt_flag_get()
Dgd32e50x_exmc.c674 uint32_t status = 0x00000000U,interrupt_enable = 0x00000000U,interrupt_state = 0x00000000U; in exmc_interrupt_flag_get() local
680 interrupt_enable = (status & interrupt); in exmc_interrupt_flag_get()
682 if ((interrupt_enable) && (interrupt_state)){ in exmc_interrupt_flag_get()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_dma.c618 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
623 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
627 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
631 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
638 if((0U != interrupt_flag) && (0U != interrupt_enable)){ in dma_interrupt_flag_get()
Dgd32f403_exmc.c640 uint32_t status = 0x00000000U,interrupt_enable = 0x00000000U,interrupt_state = 0x00000000U; in exmc_interrupt_flag_get() local
646 interrupt_enable = (status & interrupt); in exmc_interrupt_flag_get()
648 if ((interrupt_enable) && (interrupt_state)){ in exmc_interrupt_flag_get()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_dma.c619 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
625 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
630 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
635 interrupt_enable = DMA_CHCTL(dma_periph, channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
642 if((0U != interrupt_flag) && (0U != interrupt_enable)){ in dma_interrupt_flag_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_dma.c508 uint32_t interrupt_enable = 0U, interrupt_flag = 0U; in dma_interrupt_flag_get() local
513 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_FTFIE; in dma_interrupt_flag_get()
517 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_HTFIE; in dma_interrupt_flag_get()
521 interrupt_enable = DMA_CHCTL(channelx) & DMA_CHXCTL_ERRIE; in dma_interrupt_flag_get()
527 if(interrupt_flag && interrupt_enable) { in dma_interrupt_flag_get()