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Searched refs:exmc_nand_bank (Results 1 – 6 of 6) sorted by relevance

/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_exmc.c301 void exmc_nand_deinit(uint32_t exmc_nand_bank) in exmc_nand_deinit() argument
304 EXMC_NPCTL(exmc_nand_bank) = BANK1_2_NPCTL_RESET; in exmc_nand_deinit()
305 EXMC_NPINTEN(exmc_nand_bank) = BANK1_2_NPINTEN_RESET; in exmc_nand_deinit()
306 EXMC_NPCTCFG(exmc_nand_bank) = BANK1_2_NPCTCFG_RESET; in exmc_nand_deinit()
307 EXMC_NPATCFG(exmc_nand_bank) = BANK1_2_NPATCFG_RESET; in exmc_nand_deinit()
395 void exmc_nand_enable(uint32_t exmc_nand_bank) in exmc_nand_enable() argument
397 EXMC_NPCTL(exmc_nand_bank) |= EXMC_NPCTL_NDBKEN; in exmc_nand_enable()
408 void exmc_nand_disable(uint32_t exmc_nand_bank) in exmc_nand_disable() argument
410 EXMC_NPCTL(exmc_nand_bank) &= (~EXMC_NPCTL_NDBKEN); in exmc_nand_disable()
422 void exmc_nand_ecc_config(uint32_t exmc_nand_bank, ControlStatus newvalue) in exmc_nand_ecc_config() argument
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/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_exmc.c263 void exmc_nand_deinit(uint32_t exmc_nand_bank) in exmc_nand_deinit() argument
266 EXMC_NPCTL(exmc_nand_bank) = BANK1_2_NPCTL_RESET; in exmc_nand_deinit()
267 EXMC_NPINTEN(exmc_nand_bank) = BANK1_2_NPINTEN_RESET; in exmc_nand_deinit()
268 EXMC_NPCTCFG(exmc_nand_bank) = BANK1_2_NPCTCFG_RESET; in exmc_nand_deinit()
269 EXMC_NPATCFG(exmc_nand_bank) = BANK1_2_NPATCFG_RESET; in exmc_nand_deinit()
349 void exmc_nand_enable(uint32_t exmc_nand_bank) in exmc_nand_enable() argument
351 EXMC_NPCTL(exmc_nand_bank) |= EXMC_NPCTL_NDBKEN; in exmc_nand_enable()
362 void exmc_nand_disable(uint32_t exmc_nand_bank) in exmc_nand_disable() argument
364 EXMC_NPCTL(exmc_nand_bank) &= (~EXMC_NPCTL_NDBKEN); in exmc_nand_disable()
503 void exmc_nand_ecc_config(uint32_t exmc_nand_bank, ControlStatus newvalue) in exmc_nand_ecc_config() argument
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/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_exmc.c305 void exmc_nand_deinit(uint32_t exmc_nand_bank) in exmc_nand_deinit() argument
308 EXMC_NPCTL(exmc_nand_bank) = BANK1_2_NPCTL_RESET; in exmc_nand_deinit()
309 EXMC_NPINTEN(exmc_nand_bank) = BANK1_2_NPINTEN_RESET; in exmc_nand_deinit()
310 EXMC_NPCTCFG(exmc_nand_bank) = BANK1_2_NPCTCFG_RESET; in exmc_nand_deinit()
311 EXMC_NPATCFG(exmc_nand_bank) = BANK1_2_NPATCFG_RESET; in exmc_nand_deinit()
399 void exmc_nand_enable(uint32_t exmc_nand_bank) in exmc_nand_enable() argument
401 EXMC_NPCTL(exmc_nand_bank) |= EXMC_NPCTL_NDBKEN; in exmc_nand_enable()
412 void exmc_nand_disable(uint32_t exmc_nand_bank) in exmc_nand_disable() argument
414 EXMC_NPCTL(exmc_nand_bank) &= ~EXMC_NPCTL_NDBKEN; in exmc_nand_disable()
767 void exmc_nand_ecc_config(uint32_t exmc_nand_bank, ControlStatus newvalue) in exmc_nand_ecc_config() argument
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/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_exmc.h402 void exmc_nand_deinit(uint32_t exmc_nand_bank);
408 void exmc_nand_enable(uint32_t exmc_nand_bank);
410 void exmc_nand_disable(uint32_t exmc_nand_bank);
412 void exmc_nand_ecc_config(uint32_t exmc_nand_bank, ControlStatus newvalue);
414 uint32_t exmc_ecc_get(uint32_t exmc_nand_bank);
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_exmc.h400 void exmc_nand_deinit(uint32_t exmc_nand_bank);
406 void exmc_nand_enable(uint32_t exmc_nand_bank);
408 void exmc_nand_disable(uint32_t exmc_nand_bank);
427 void exmc_nand_ecc_config(uint32_t exmc_nand_bank, ControlStatus newvalue);
429 uint32_t exmc_ecc_get(uint32_t exmc_nand_bank);
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_exmc.h720 void exmc_nand_deinit(uint32_t exmc_nand_bank);
726 void exmc_nand_enable(uint32_t exmc_nand_bank);
728 void exmc_nand_disable(uint32_t exmc_nand_bank);
763 void exmc_nand_ecc_config(uint32_t exmc_nand_bank, ControlStatus newvalue);
765 uint32_t exmc_ecc_get(uint32_t exmc_nand_bank);