| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_timer.c | 440 uint32_t ctl; in timer_dma_transfer_config() local
441 ctl = TIMER_DMACFG(timer_periph); in timer_dma_transfer_config()
442 ctl &= (~(uint32_t)(TIMER_DMACFG_DMATA | TIMER_DMACFG_DMATC)); in timer_dma_transfer_config()
443 ctl |= (uint32_t)(dma_baseaddr | dma_lenth); in timer_dma_transfer_config()
444 TIMER_DMACFG(timer_periph) = ctl; in timer_dma_transfer_config()
496 uint32_t ctl; in timer_channel_output_config() local
507 ctl = TIMER_CHCTL2(timer_periph); in timer_channel_output_config()
508 ctl &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
509 ctl |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
510 TIMER_CHCTL2(timer_periph) = ctl; in timer_channel_output_config()
[all …]
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_bkp.c | 146 uint16_t ctl = 0U; in bkp_rtc_output_select() local
148 ctl = BKP_OCTL; in bkp_rtc_output_select()
149 ctl &= (uint16_t)~BKP_OCTL_ROSEL; in bkp_rtc_output_select()
150 ctl |= outputsel; in bkp_rtc_output_select()
151 BKP_OCTL = ctl; in bkp_rtc_output_select()
165 uint16_t ctl = 0U; in bkp_rtc_clock_output_select() local
167 ctl = BKP_OCTL; in bkp_rtc_clock_output_select()
168 ctl &= (uint16_t)~BKP_OCTL_CCOSEL; in bkp_rtc_clock_output_select()
169 ctl |= clocksel; in bkp_rtc_clock_output_select()
170 BKP_OCTL = ctl; in bkp_rtc_clock_output_select()
[all …]
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_i2c.c | 164 uint32_t ctl = 0U; in i2c_mode_addr_config() local
166 ctl = I2C_CTL0(i2c_periph); in i2c_mode_addr_config()
167 ctl &= ~(I2C_CTL0_SMBEN); in i2c_mode_addr_config()
168 ctl |= mode; in i2c_mode_addr_config()
169 I2C_CTL0(i2c_periph) = ctl; in i2c_mode_addr_config()
206 uint32_t ctl = 0U; in i2c_ack_config() local
208 ctl = I2C_CTL0(i2c_periph); in i2c_ack_config()
209 ctl &= ~(I2C_CTL0_ACKEN); in i2c_ack_config()
210 ctl |= ack; in i2c_ack_config()
211 I2C_CTL0(i2c_periph) = ctl; in i2c_ack_config()
[all …]
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| D | gd32f4xx_usart.c | 235 uint32_t ctl = 0U; in usart_transmit_config() local
237 ctl = USART_CTL0(usart_periph); in usart_transmit_config()
238 ctl &= ~USART_CTL0_TEN; in usart_transmit_config()
239 ctl |= txconfig; in usart_transmit_config()
241 USART_CTL0(usart_periph) = ctl; in usart_transmit_config()
256 uint32_t ctl = 0U; in usart_receive_config() local
258 ctl = USART_CTL0(usart_periph); in usart_receive_config()
259 ctl &= ~USART_CTL0_REN; in usart_receive_config()
260 ctl |= rxconfig; in usart_receive_config()
262 USART_CTL0(usart_periph) = ctl; in usart_receive_config()
[all …]
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| D | gd32f4xx_dma.c | 134 uint32_t ctl; in dma_single_data_mode_init() local
149 ctl = DMA_CHCTL(dma_periph, channelx); in dma_single_data_mode_init()
150 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO | DMA_CHXCTL_TM); in dma_single_data_mode_init()
151 …ctl |= (init_struct->periph_memory_width | (init_struct->periph_memory_width << 2) | init_struct->… in dma_single_data_mode_init()
152 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_single_data_mode_init()
203 uint32_t ctl; in dma_multi_data_mode_init() local
218 ctl = DMA_CHCTL(dma_periph, channelx); in dma_multi_data_mode_init()
219 …ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO | DMA_CHXCTL_TM | DMA_CHXCTL_PBUR… in dma_multi_data_mode_init()
220 …ctl |= (init_struct->periph_width | (init_struct->memory_width) | init_struct->priority | init_str… in dma_multi_data_mode_init()
222 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_multi_data_mode_init()
[all …]
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| D | gd32f4xx_dac.c | 436 uint32_t ctl = 0U; in dac_concurrent_enable() local
437 ctl = DAC_CTL_DEN0 | DAC_CTL_DEN1; in dac_concurrent_enable()
438 DAC_CTL |= (ctl); in dac_concurrent_enable()
449 uint32_t ctl = 0U; in dac_concurrent_disable() local
450 ctl = DAC_CTL_DEN0 | DAC_CTL_DEN1; in dac_concurrent_disable()
451 DAC_CTL &= (~ctl); in dac_concurrent_disable()
488 uint32_t ctl = 0U; in dac_concurrent_output_buffer_enable() local
489 ctl = DAC_CTL_DBOFF0 | DAC_CTL_DBOFF1; in dac_concurrent_output_buffer_enable()
490 DAC_CTL &= (~ctl); in dac_concurrent_output_buffer_enable()
501 uint32_t ctl = 0U; in dac_concurrent_output_buffer_disable() local
[all …]
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_i2c.c | 175 uint32_t ctl = 0U; in i2c_mode_addr_config() local
177 ctl = I2C_CTL0(i2c_periph); in i2c_mode_addr_config()
178 ctl &= ~(I2C_CTL0_SMBEN); in i2c_mode_addr_config()
179 ctl |= mode; in i2c_mode_addr_config()
180 I2C_CTL0(i2c_periph) = ctl; in i2c_mode_addr_config()
217 uint32_t ctl = 0U; in i2c_ack_config() local
219 ctl = I2C_CTL0(i2c_periph); in i2c_ack_config()
220 ctl &= ~(I2C_CTL0_ACKEN); in i2c_ack_config()
221 ctl |= ack; in i2c_ack_config()
222 I2C_CTL0(i2c_periph) = ctl; in i2c_ack_config()
[all …]
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| D | gd32e10x_bkp.c | 154 uint16_t ctl = 0U; in bkp_rtc_output_select() local
157 ctl = BKP_OCTL; in bkp_rtc_output_select()
158 ctl &= (uint16_t)~BKP_OCTL_ROSEL; in bkp_rtc_output_select()
159 ctl |= outputsel; in bkp_rtc_output_select()
160 BKP_OCTL = ctl; in bkp_rtc_output_select()
174 uint16_t ctl = 0U; in bkp_rtc_clock_output_select() local
177 ctl = BKP_OCTL; in bkp_rtc_clock_output_select()
178 ctl &= (uint16_t)~BKP_OCTL_CCOSEL; in bkp_rtc_clock_output_select()
179 ctl |= clocksel; in bkp_rtc_clock_output_select()
180 BKP_OCTL = ctl; in bkp_rtc_clock_output_select()
[all …]
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| D | gd32e10x_usart.c | 217 uint32_t ctl = 0U; in usart_transmit_config() local
219 ctl = USART_CTL0(usart_periph); in usart_transmit_config()
220 ctl &= ~USART_CTL0_TEN; in usart_transmit_config()
221 ctl |= txconfig; in usart_transmit_config()
223 USART_CTL0(usart_periph) = ctl; in usart_transmit_config()
238 uint32_t ctl = 0U; in usart_receive_config() local
240 ctl = USART_CTL0(usart_periph); in usart_receive_config()
241 ctl &= ~USART_CTL0_REN; in usart_receive_config()
242 ctl |= rxconfig; in usart_receive_config()
244 USART_CTL0(usart_periph) = ctl; in usart_receive_config()
[all …]
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| D | gd32e10x_dma.c | 118 uint32_t ctl; in dma_init() local
134 ctl = DMA_CHCTL(dma_periph, channelx); in dma_init()
135 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
136 ctl |= (init_struct->periph_width | init_struct->memory_width | init_struct->priority); in dma_init()
137 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_init()
373 uint32_t ctl; in dma_priority_config() local
380 ctl = DMA_CHCTL(dma_periph, channelx); in dma_priority_config()
382 ctl &= ~DMA_CHXCTL_PRIO; in dma_priority_config()
383 ctl |= priority; in dma_priority_config()
384 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_priority_config()
[all …]
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_i2c.c | 172 uint32_t ctl = 0U; in i2c_mode_addr_config() local
174 ctl = I2C_CTL0(i2c_periph); in i2c_mode_addr_config()
175 ctl &= ~(I2C_CTL0_SMBEN); in i2c_mode_addr_config()
176 ctl |= mode; in i2c_mode_addr_config()
177 I2C_CTL0(i2c_periph) = ctl; in i2c_mode_addr_config()
369 uint32_t ctl = 0U; in i2c_dma_enable() local
371 ctl = I2C_CTL1(i2c_periph); in i2c_dma_enable()
372 ctl &= ~(I2C_CTL1_DMAON); in i2c_dma_enable()
373 ctl |= dmastate; in i2c_dma_enable()
374 I2C_CTL1(i2c_periph) = ctl; in i2c_dma_enable()
[all …]
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| D | gd32vf103_usart.c | 211 uint32_t ctl = 0U; in usart_transmit_config() local
213 ctl = USART_CTL0(usart_periph); in usart_transmit_config()
214 ctl &= ~USART_CTL0_TEN; in usart_transmit_config()
215 ctl |= txconfig; in usart_transmit_config()
217 USART_CTL0(usart_periph) = ctl; in usart_transmit_config()
232 uint32_t ctl = 0U; in usart_receive_config() local
234 ctl = USART_CTL0(usart_periph); in usart_receive_config()
235 ctl &= ~USART_CTL0_REN; in usart_receive_config()
236 ctl |= rxconfig; in usart_receive_config()
238 USART_CTL0(usart_periph) = ctl; in usart_receive_config()
[all …]
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| D | gd32vf103_bkp.c | 152 uint16_t ctl = 0U; in bkp_rtc_output_select() local
155 ctl = BKP_OCTL; in bkp_rtc_output_select()
156 ctl &= (uint16_t)~BKP_OCTL_ROSEL; in bkp_rtc_output_select()
157 ctl |= outputsel; in bkp_rtc_output_select()
158 BKP_OCTL = ctl; in bkp_rtc_output_select()
170 uint16_t ctl; in bkp_rtc_calibration_value_set() local
173 ctl = BKP_OCTL; in bkp_rtc_calibration_value_set()
174 ctl &= (uint16_t)~BKP_OCTL_RCCV; in bkp_rtc_calibration_value_set()
175 ctl |= (uint16_t)OCTL_RCCV(value); in bkp_rtc_calibration_value_set()
176 BKP_OCTL = ctl; in bkp_rtc_calibration_value_set()
[all …]
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| D | gd32vf103_dma.c | 112 uint32_t ctl; in dma_init() local
128 ctl = DMA_CHCTL(dma_periph, channelx); in dma_init()
129 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
130 ctl |= (init_struct->periph_width | init_struct->memory_width | init_struct->priority); in dma_init()
131 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_init()
366 uint32_t ctl; in dma_priority_config() local
373 ctl = DMA_CHCTL(dma_periph, channelx); in dma_priority_config()
375 ctl &= ~DMA_CHXCTL_PRIO; in dma_priority_config()
376 ctl |= priority; in dma_priority_config()
377 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_priority_config()
[all …]
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| D | gd32vf103_dac.c | 434 uint32_t ctl = 0U; in dac_concurrent_enable() local
435 ctl = DAC_CTL_DEN0 | DAC_CTL_DEN1; in dac_concurrent_enable()
436 DAC_CTL |= (ctl); in dac_concurrent_enable()
447 uint32_t ctl = 0U; in dac_concurrent_disable() local
448 ctl = DAC_CTL_DEN0 | DAC_CTL_DEN1; in dac_concurrent_disable()
449 DAC_CTL &= (~ctl); in dac_concurrent_disable()
486 uint32_t ctl = 0U; in dac_concurrent_output_buffer_enable() local
487 ctl = DAC_CTL_DBOFF0 | DAC_CTL_DBOFF1; in dac_concurrent_output_buffer_enable()
488 DAC_CTL &= (~ctl); in dac_concurrent_output_buffer_enable()
499 uint32_t ctl = 0U; in dac_concurrent_output_buffer_disable() local
[all …]
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_i2c.c | 181 uint32_t ctl = 0U; in i2c_mode_addr_config() local
183 ctl = I2C_CTL0(i2c_periph); in i2c_mode_addr_config()
184 ctl &= ~(I2C_CTL0_SMBEN); in i2c_mode_addr_config()
185 ctl |= mode; in i2c_mode_addr_config()
186 I2C_CTL0(i2c_periph) = ctl; in i2c_mode_addr_config()
378 uint32_t ctl = 0U; in i2c_dma_enable() local
380 ctl = I2C_CTL1(i2c_periph); in i2c_dma_enable()
381 ctl &= ~(I2C_CTL1_DMAON); in i2c_dma_enable()
382 ctl |= dmastate; in i2c_dma_enable()
383 I2C_CTL1(i2c_periph) = ctl; in i2c_dma_enable()
[all …]
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| D | gd32f403_bkp.c | 149 uint16_t ctl = 0U; in bkp_rtc_output_select() local
151 ctl = BKP_OCTL; in bkp_rtc_output_select()
152 ctl &= (uint16_t)~BKP_OCTL_ROSEL; in bkp_rtc_output_select()
153 ctl |= outputsel; in bkp_rtc_output_select()
154 BKP_OCTL = ctl; in bkp_rtc_output_select()
167 uint16_t ctl = 0U; in bkp_rtc_clock_output_select() local
169 ctl = BKP_OCTL; in bkp_rtc_clock_output_select()
170 ctl &= (uint16_t)~BKP_OCTL_CCOSEL; in bkp_rtc_clock_output_select()
171 ctl |= clocksel; in bkp_rtc_clock_output_select()
172 BKP_OCTL = ctl; in bkp_rtc_clock_output_select()
[all …]
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| D | gd32f403_usart.c | 215 uint32_t ctl = 0U; in usart_transmit_config() local
217 ctl = USART_CTL0(usart_periph); in usart_transmit_config()
218 ctl &= ~USART_CTL0_TEN; in usart_transmit_config()
219 ctl |= txconfig; in usart_transmit_config()
221 USART_CTL0(usart_periph) = ctl; in usart_transmit_config()
236 uint32_t ctl = 0U; in usart_receive_config() local
238 ctl = USART_CTL0(usart_periph); in usart_receive_config()
239 ctl &= ~USART_CTL0_REN; in usart_receive_config()
240 ctl |= rxconfig; in usart_receive_config()
242 USART_CTL0(usart_periph) = ctl; in usart_receive_config()
[all …]
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| D | gd32f403_dma.c | 117 uint32_t ctl; in dma_init() local
133 ctl = DMA_CHCTL(dma_periph, channelx); in dma_init()
134 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
135 ctl |= (init_struct->periph_width | init_struct->memory_width | init_struct->priority); in dma_init()
136 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_init()
371 uint32_t ctl; in dma_priority_config() local
378 ctl = DMA_CHCTL(dma_periph, channelx); in dma_priority_config()
380 ctl &= ~DMA_CHXCTL_PRIO; in dma_priority_config()
381 ctl |= priority; in dma_priority_config()
382 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_priority_config()
[all …]
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| D | gd32f403_dac.c | 433 uint32_t ctl = 0U; in dac_concurrent_enable() local
434 ctl = DAC_CTL_DEN0 | DAC_CTL_DEN1; in dac_concurrent_enable()
435 DAC_CTL |= (ctl); in dac_concurrent_enable()
446 uint32_t ctl = 0U; in dac_concurrent_disable() local
447 ctl = DAC_CTL_DEN0 | DAC_CTL_DEN1; in dac_concurrent_disable()
448 DAC_CTL &= (~ctl); in dac_concurrent_disable()
485 uint32_t ctl = 0U; in dac_concurrent_output_buffer_enable() local
486 ctl = DAC_CTL_DBOFF0 | DAC_CTL_DBOFF1; in dac_concurrent_output_buffer_enable()
487 DAC_CTL &= (~ctl); in dac_concurrent_output_buffer_enable()
498 uint32_t ctl = 0U; in dac_concurrent_output_buffer_disable() local
[all …]
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_i2c.c | 173 uint32_t ctl = 0U; in i2c_mode_addr_config() local
175 ctl = I2C_CTL0(i2c_periph); in i2c_mode_addr_config()
176 ctl &= ~(I2C_CTL0_SMBEN); in i2c_mode_addr_config()
177 ctl |= mode; in i2c_mode_addr_config()
178 I2C_CTL0(i2c_periph) = ctl; in i2c_mode_addr_config()
371 uint32_t ctl = 0U; in i2c_dma_enable() local
373 ctl = I2C_CTL1(i2c_periph); in i2c_dma_enable()
374 ctl &= ~(I2C_CTL1_DMAON); in i2c_dma_enable()
375 ctl |= dmastate; in i2c_dma_enable()
376 I2C_CTL1(i2c_periph) = ctl; in i2c_dma_enable()
[all …]
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| D | gd32f3x0_dma.c | 99 uint32_t ctl; in dma_init() local
113 ctl = DMA_CHCTL(channelx); in dma_init()
114 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
115 ctl |= (init_struct->periph_width | init_struct->memory_width | init_struct->priority); in dma_init()
116 DMA_CHCTL(channelx) = ctl; in dma_init()
289 uint32_t ctl; in dma_priority_config() local
292 ctl = DMA_CHCTL(channelx); in dma_priority_config()
294 ctl &= ~DMA_CHXCTL_PRIO; in dma_priority_config()
295 ctl |= priority; in dma_priority_config()
296 DMA_CHCTL(channelx) = ctl; in dma_priority_config()
[all …]
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_bkp.c | 152 uint16_t ctl = 0U; in bkp_rtc_output_select() local
154 ctl = BKP_OCTL; in bkp_rtc_output_select()
155 ctl &= (uint16_t)~BKP_OCTL_ROSEL; in bkp_rtc_output_select()
156 ctl |= outputsel; in bkp_rtc_output_select()
157 BKP_OCTL = ctl; in bkp_rtc_output_select()
171 uint16_t ctl = 0U; in bkp_rtc_clock_output_select() local
173 ctl = BKP_OCTL; in bkp_rtc_clock_output_select()
174 ctl &= (uint16_t)~BKP_OCTL_CCOSEL; in bkp_rtc_clock_output_select()
175 ctl |= clocksel; in bkp_rtc_clock_output_select()
176 BKP_OCTL = ctl; in bkp_rtc_clock_output_select()
[all …]
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| D | gd32e50x_usart.c | 278 uint32_t ctl = 0U; in usart_transmit_config() local
281 ctl = USART5_CTL0(usart_periph); in usart_transmit_config()
282 ctl &= ~USART5_CTL0_TEN; in usart_transmit_config()
283 ctl |= (USART5_CTL0_TEN & txconfig); in usart_transmit_config()
285 USART5_CTL0(usart_periph) = ctl; in usart_transmit_config()
287 ctl = USART_CTL0(usart_periph); in usart_transmit_config()
288 ctl &= ~USART_CTL0_TEN; in usart_transmit_config()
289 ctl |= (USART_CTL0_TEN & txconfig); in usart_transmit_config()
291 USART_CTL0(usart_periph) = ctl; in usart_transmit_config()
307 uint32_t ctl = 0U; in usart_receive_config() local
[all …]
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| D | gd32e50x_dma.c | 117 uint32_t ctl; in dma_init() local
137 ctl = DMA_CHCTL(dma_periph, channelx); in dma_init()
138 ctl &= ~(DMA_CHXCTL_PWIDTH | DMA_CHXCTL_MWIDTH | DMA_CHXCTL_PRIO); in dma_init()
139 ctl |= (init_struct->periph_width | init_struct->memory_width | init_struct->priority); in dma_init()
140 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_init()
375 uint32_t ctl; in dma_priority_config() local
382 ctl = DMA_CHCTL(dma_periph, channelx); in dma_priority_config()
384 ctl &= ~DMA_CHXCTL_PRIO; in dma_priority_config()
385 ctl |= priority; in dma_priority_config()
386 DMA_CHCTL(dma_periph, channelx) = ctl; in dma_priority_config()
[all …]
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