Searched refs:USART5_CTL2_REG_OFFSET (Results 1 – 1 of 1) sorted by relevance
| /hal_gigadevice-latest/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_usart.h | 323 #define USART5_CTL2_REG_OFFSET 0x00000008U /*!< CTL2 register offset */ macro
424 …USART5_INT_FLAG_WU = USART_REGIDX_BIT2(USART5_CTL2_REG_OFFSET, 22U, USART5_STAT_REG_OFFSET, 20U), …
425 …USART5_INT_FLAG_ERR_NERR = USART_REGIDX_BIT2(USART5_CTL2_REG_OFFSET, 0U, USART5_STAT_REG_OFFSET, 2…
426 …USART5_INT_FLAG_ERR_ORERR = USART_REGIDX_BIT2(USART5_CTL2_REG_OFFSET, 0U, USART5_STAT_REG_OFFSET, …
427 …USART5_INT_FLAG_ERR_FERR = USART_REGIDX_BIT2(USART5_CTL2_REG_OFFSET, 0U, USART5_STAT_REG_OFFSET, 1…
469 …USART5_INT_WU = USART_REGIDX_BIT(USART5_CTL2_REG_OFFSET, 22U), /*!< wakeup from deep-sleep…
470 USART5_INT_ERR = USART_REGIDX_BIT(USART5_CTL2_REG_OFFSET, 0U), /*!< error interrupt */
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