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Searched refs:USART5_CTL2 (Results 1 – 2 of 2) sorted by relevance

/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c367 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_OSB); in usart_sample_bit_config()
369 USART5_CTL2(usart_periph) |= (USART5_CTL2_OSB & obsm); in usart_sample_bit_config()
603 USART5_CTL2(usart_periph) |= (USART5_CTL2_HDEN); in usart_halfduplex_enable()
622 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_HDEN); in usart_halfduplex_disable()
748 USART5_CTL2(usart_periph) |= USART5_CTL2_SCEN; in usart_smartcard_mode_enable()
767 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_SCEN); in usart_smartcard_mode_disable()
786 USART5_CTL2(usart_periph) |= USART5_CTL2_NKEN; in usart_smartcard_mode_nack_enable()
805 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_NKEN); in usart_smartcard_mode_nack_disable()
825 USART5_CTL2(usart_periph) &= ~(USART5_CTL2_SCRTNUM); in usart_smartcard_autoretry_config()
827 USART5_CTL2(usart_periph) |= (USART5_CTL2_SCRTNUM & (scrtnum << 17)); in usart_smartcard_autoretry_config()
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/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h68 #define USART5_CTL2(usartx) REG32((usartx) + 0x000000008U) /*!< USART5 control reg… macro