Searched refs:USART5_CTL1 (Results 1 – 2 of 2) sorted by relevance
221 USART5_CTL1(usart_periph) &= ~USART5_CTL1_STB; in usart_stop_bit_set()223 USART5_CTL1(usart_periph) |= (USART5_CTL1_STB & stblen); in usart_stop_bit_set()387 USART5_CTL1(usart_periph) |= USART5_CTL1_RTEN; in usart_receiver_timeout_enable()404 USART5_CTL1(usart_periph) &= ~USART5_CTL1_RTEN; in usart_receiver_timeout_disable()539 USART5_CTL1(usart_periph) |= USART5_CTL1_LMEN; in usart_lin_mode_enable()558 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_LMEN); in usart_lin_mode_disable()581 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_LBLEN); in usart_lin_break_detection_length_config()583 USART5_CTL1(usart_periph) |= USART5_CTL1_LBLEN & (lblen); in usart_lin_break_detection_length_config()641 USART5_CTL1(usart_periph) |= USART5_CTL1_CKEN; in usart_synchronous_clock_enable()660 USART5_CTL1(usart_periph) &= ~(USART5_CTL1_CKEN); in usart_synchronous_clock_disable()[all …]
67 #define USART5_CTL1(usartx) REG32((usartx) + 0x000000004U) /*!< USART5 control reg… macro
