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Searched refs:USART0 (Results 1 – 19 of 19) sorted by relevance

/hal_gigadevice-latest/gd32vf103/riscv/stubs/
Dwrite.c67 usart_data_transmit(USART0, (uint8_t) ch ); in _put_char()
68 while (usart_flag_get(USART0, USART_FLAG_TBE)== RESET){ in _put_char()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_usart.c48 case USART0: in usart_deinit()
90 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_usart.c53 case USART0: in usart_deinit()
95 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_usart.c54 case USART0: in usart_deinit()
96 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_usart.c54 case USART0: in usart_deinit()
103 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_usart.c46 case USART0: in usart_deinit()
83 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_usart.c56 case USART0: in usart_deinit()
83 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_usart.c47 case USART0: in usart_deinit()
79 case USART0: in usart_baudrate_set()
Dgd32a50x_rcu.c491 case USART0: in rcu_usart_clock_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_usart.c54 case USART0: in usart_deinit()
95 case USART0: in usart_baudrate_set()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_usart.h47 #define USART0 (USART_BASE+(0x0000F400U)) /*!< USART0 base address */ macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_usart.h47 #define USART0 (USART_BASE+0x0000F400U) /*!< USART0 base address */ macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_usart.h48 #define USART0 (USART_BASE+0x0000F400U) /*!< USART0 base address */ macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_usart.h50 #define USART0 (USART_BASE+0x0000CC00U) /*!< USART0 base address */ macro
/hal_gigadevice-latest/pinconfigs/
DREADME.md167 For GD32F350xB/8/6 devices, there have some invalid signal mapping for USART0, I2C0 and SPI0.
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_usart.h43 #define USART0 (USART_BASE + 0x0000F400U) macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_usart.h42 #define USART0 (USART_BASE + 0x0000F400U) macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_usart.h41 #define USART0 (USART_BASE + 0x0000F400U) macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_usart.h48 #define USART0 (USART_BASE+0x0000F400U) /*!< USART0 base address */ macro