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Searched refs:TIMER_CHVSEL_ENABLE (Results 1 – 15 of 15) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_timer.h454 #define TIMER_CHVSEL_ENABLE ((uint16_t)0x0002U) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h611 #define TIMER_CHVSEL_ENABLE ((uint16_t)0x0002U) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h566 #define TIMER_CHVSEL_ENABLE ((uint16_t)TIMER_CFG_OUTSEL) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h588 #define TIMER_CHVSEL_ENABLE ((uint16_t)0x0002U) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h582 #define TIMER_CHVSEL_ENABLE ((uint16_t)0x0002U) /*!< write CHx… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h591 #define TIMER_CHVSEL_ENABLE ((uint16_t)0x0002U) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h580 #define TIMER_CHVSEL_ENABLE ((uint16_t)TIMER_CFG_OUTSEL) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_timer.c1667 if(TIMER_CHVSEL_ENABLE == ccsel) { in timer_write_chxval_register_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h896 #define TIMER_CHVSEL_ENABLE ((uint16_t)TIMER_CFG_CHVSEL) /*!< write CHxV… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c1892 if(TIMER_CHVSEL_ENABLE == ccsel) { in timer_write_chxval_register_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c2001 if(TIMER_CHVSEL_ENABLE == ccsel){ in timer_write_chxval_register_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c1871 if(TIMER_CHVSEL_ENABLE == ccsel){ in timer_write_chxval_register_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c2035 if(TIMER_CHVSEL_ENABLE == ccsel){ in timer_write_chxval_register_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c1870 if(TIMER_CHVSEL_ENABLE == ccsel){ in timer_write_chxval_register_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c2397 if(TIMER_CHVSEL_ENABLE == ccsel) { in timer_write_chxval_register_config()