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Searched refs:TIMER_CHCTL1_CH3MS (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_timer.c542 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1042 ctl &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c811 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1316 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c943 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1448 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c796 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1291 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c816 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1321 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c955 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1466 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c829 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1324 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_timer.h154 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h183 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h172 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h181 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h180 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h179 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h182 #define TIMER_CHCTL1_CH3MS BITS(8,9) /*!< channel 3 mode selection */ macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c843 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1470 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h225 #define TIMER_CHCTL1_CH3MS (TIMER_CHCTL1_CH3MS_BIT2 | BITS(8,9)) /*!< channel 3 … macro