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Searched refs:TIMER_CHCTL1_CH3COMSEN (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_timer.h156 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h185 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h174 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h183 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h182 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h181 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h184 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 output compare shadow e… macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_timer.c698 ctl &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h226 #define TIMER_CHCTL1_CH3COMSEN BIT(11) /*!< channel 3 … macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c954 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c1086 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c926 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c959 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c1098 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c959 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c1023 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()