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Searched refs:TIMER_CHCTL1 (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_timer.c529 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
542 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
599 ctl = TIMER_CHCTL1(timer_periph); in timer_channel_output_mode_config()
602 TIMER_CHCTL1(timer_periph) = ctl; in timer_channel_output_mode_config()
606 ctl = TIMER_CHCTL1(timer_periph); in timer_channel_output_mode_config()
609 TIMER_CHCTL1(timer_periph) = ctl; in timer_channel_output_mode_config()
690 ctl = TIMER_CHCTL1(timer_periph); in timer_channel_output_shadow_config()
693 TIMER_CHCTL1(timer_periph) = ctl; in timer_channel_output_shadow_config()
697 ctl = TIMER_CHCTL1(timer_periph); in timer_channel_output_shadow_config()
700 TIMER_CHCTL1(timer_periph) = ctl; in timer_channel_output_shadow_config()
[all …]
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c780 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
811 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
868 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
869 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
873 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
874 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
949 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
950 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
954 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
955 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
[all …]
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c912 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
943 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1000 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
1001 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
1005 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
1006 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
1081 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
1082 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
1086 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
1087 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
[all …]
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c777 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
796 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
840 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
841 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
845 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
846 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
921 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
922 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
926 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
927 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
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/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c785 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
816 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
873 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
874 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
878 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
879 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
954 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
955 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
959 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
960 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
[all …]
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c924 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
955 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
1012 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
1013 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
1017 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
1018 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
1093 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
1094 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
1098 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
1099 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
[all …]
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c810 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
829 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
873 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
874 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
878 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
879 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
954 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
955 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
959 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
960 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
[all …]
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c811 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
843 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH3MS; in timer_channel_output_config()
891 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMCTL); in timer_channel_output_mode_config()
892 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocmode; in timer_channel_output_mode_config()
896 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMCTL); in timer_channel_output_mode_config()
897 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocmode) << 8U); in timer_channel_output_mode_config()
1018 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2COMSEN); in timer_channel_output_shadow_config()
1019 TIMER_CHCTL1(timer_periph) |= (uint32_t)ocshadow; in timer_channel_output_shadow_config()
1023 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH3COMSEN); in timer_channel_output_shadow_config()
1024 TIMER_CHCTL1(timer_periph) |= (uint32_t)((uint32_t)(ocshadow) << 8U); in timer_channel_output_shadow_config()
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/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_timer.h56 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h67 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h58 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h66 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h64 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h62 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x0000001CU) /*!< TIMER channel c… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h67 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x1CU) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h57 #define TIMER_CHCTL1(timerx) REG32((timerx) + 0x0000001CU) /*!< TIMER chan… macro