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Searched refs:SYSCFG_CPSCTL_CPS_RDY (Results 1 – 4 of 4) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_syscfg.c223 if(((uint32_t)RESET) != (SYSCFG_CPSCTL & SYSCFG_CPSCTL_CPS_RDY)){ in syscfg_cps_rdy_flag_get()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_syscfg.c200 if(((uint32_t)RESET) != (SYSCFG_CPSCTL & SYSCFG_CPSCTL_CPS_RDY)) { in syscfg_flag_get()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_syscfg.h89 #define SYSCFG_CPSCTL_CPS_RDY BIT(8) /*!< I/O compensation cell is … macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_syscfg.h95 #define SYSCFG_CPSCTL_CPS_RDY BIT(8) /*!< I/O compensati… macro