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Searched refs:SPI_CTL1_TBEIE (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_spi.c613 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
645 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
684 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_spi.c639 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
671 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
710 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_spi.c685 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
717 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
756 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_spi.c692 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
724 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
763 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_spi.c725 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
757 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
796 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_spi.c815 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_TBEIE; in spi_i2s_interrupt_enable()
847 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_TBEIE); in spi_i2s_interrupt_disable()
886 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_spi.h99 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
250 #define SPI_I2S_INT_TBE SPI_CTL1_TBEIE /*!< transmit buffe…
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_spi.h92 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
243 #define SPI_I2S_INT_TBE SPI_CTL1_TBEIE /*!< transmit buffe…
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_spi.h82 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_spi.h84 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_spi.h83 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_spi.h87 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_spi.h103 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_spi.c751 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_spi.h82 #define SPI_CTL1_TBEIE BIT(7) /*!< transmit buffe… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_spi.c798 reg2 = reg2 & SPI_CTL1_TBEIE; in spi_i2s_interrupt_flag_get()