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Searched refs:SPI_CTL1_RBNEIE (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_spi.c617 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
649 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
689 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_spi.c643 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
675 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
715 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_spi.c689 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
721 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
761 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_spi.c696 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
728 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
768 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_spi.c729 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
761 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
801 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_spi.c819 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_RBNEIE; in spi_i2s_interrupt_enable()
851 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_RBNEIE); in spi_i2s_interrupt_disable()
891 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_spi.h98 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
251 #define SPI_I2S_INT_RBNE SPI_CTL1_RBNEIE /*!< receive buffer…
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_spi.h91 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
244 #define SPI_I2S_INT_RBNE SPI_CTL1_RBNEIE /*!< receive buffer…
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_spi.h81 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_spi.h83 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_spi.h82 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_spi.h86 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_spi.h102 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_spi.c756 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_spi.h81 #define SPI_CTL1_RBNEIE BIT(6) /*!< receive buffer… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_spi.c803 reg2 = reg2 & SPI_CTL1_RBNEIE; in spi_i2s_interrupt_flag_get()