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Searched refs:SPI_CTL1_NSSDRV (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_spi.c336 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
347 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_spi.c299 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
310 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_spi.c339 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
350 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_spi.c344 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
355 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_spi.c361 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
372 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_spi.c353 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
364 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_spi.c354 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
365 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_spi.c389 SPI_CTL1(spi_periph) |= (uint32_t)SPI_CTL1_NSSDRV; in spi_nss_output_enable()
400 SPI_CTL1(spi_periph) &= (uint32_t)(~SPI_CTL1_NSSDRV); in spi_nss_output_disable()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_spi.h77 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_spi.h79 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_spi.h78 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_spi.h82 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_spi.h99 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive nss outp… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_spi.h94 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_spi.h87 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_spi.h77 #define SPI_CTL1_NSSDRV BIT(2) /*!< drive NSS outp… macro