| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_wwdgt.c | 45 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
46 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_wwdgt.c | 48 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
49 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_wwdgt.c | 53 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
54 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_wwdgt.c | 51 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
52 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_wwdgt.c | 48 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
49 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_wwdgt.c | 53 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
54 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_wwdgt.c | 53 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
54 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_wwdgt.c | 50 rcu_periph_reset_enable(RCU_WWDGTRST); in wwdgt_deinit()
51 rcu_periph_reset_disable(RCU_WWDGTRST); in wwdgt_deinit()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_rcu.h | 323 RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT clock reset */ enumerator
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_rcu.h | 355 … RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT clock reset */ enumerator
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_rcu.h | 366 RCU_WWDGTRST = RCU_REGIDX_BIT(IDX_APB1RST, 11U), /*!< WWDGT reset */ enumerator
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_rcu.h | 383 … RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT clock reset */ enumerator
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/include/ |
| D | gd32f403_rcu.h | 387 … RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT clock reset */ enumerator
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_rcu.h | 373 RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT reset */ enumerator
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_rcu.h | 692 … RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT clock reset */ enumerator
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_rcu.h | 654 … RCU_WWDGTRST = RCU_REGIDX_BIT(APB1RST_REG_OFFSET, 11U), /*!< WWDGT clock reset */ enumerator
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